sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<LordDoskias> why would the following code: https://pastebin.com/j9W2gyxX
<LordDoskias> namely the mret, result in an illegal instruction ?
<LordDoskias> i.e when executing mret instead of jumping at the location written to mepc, it goes into the trap handler and mcause is 0x2
<LordDoskias> i'm testing on qemu-system-riscv64
<jrtc27> qemu has a special spec-violating case to help stop you shooting yourself in the foot
<jrtc27> by default the pmp blocks all s-mode acceses
<jrtc27> instead of letting you mret then trap immediately it will give an illegal instruction exception if mret'ing to non-m-mode and the pmp is unconfigured
<jrtc27> otherwise if you have set up medeleg to delegate s-mode's own faults to itself you will end up in an infinite trap loop
<LordDoskias> is this documented somewhere or there needs to be someone intimately familiar with qemu's internals on #riscv
<LordDoskias> ;D
<LordDoskias> why would mret result in an immediate trap ?
<LordDoskias> shouldn't it just jump to wherever mepc points with privilege as set in MPP ?
<jrtc27> the mret wouldn't trap, the first instruction fetch after it would
<LordDoskias> why ?
<jrtc27> because the pmp blocks it by default
<LordDoskias> and that happens only on qemu ? an actual physical implementation wouldn't act like that?
<jrtc27> an actual implementation would trap on the instruction fetch
<jrtc27> and end up in an infinite trap loop that's a pain to debug
<jrtc27> (because stvec's target isn't going to be fetchable either)
<jrtc27> qemu adds a special case to mret that stops you being able to reach that case, but isn't conforming
<LordDoskias> so the correct workaround is to basically disable pmp ?
<jrtc27> by making the mret itself fault
<jrtc27> there is no workaround
<jrtc27> your code is broken, qemu just changes its symptoms
<jrtc27> the *fix* is to configure the pmp however you want it configured
<LordDoskias> strange, according to this blog post: https://danielmangum.com/posts/risc-v-bytes-privilege-levels/
<LordDoskias> it should have worked
<jrtc27> older qemu versions didn't have it
<jrtc27> added in 6.0.0
<LordDoskias> i see
<LordDoskias> i guess i have to go and read section 3.6 of the privilege ISA to figure out how to configure the PMP
<LordDoskias> so M mode is not subject to PMP checks?
<jrtc27> locked pmp entries apply to m-mode, unlocked ones do not
<jrtc27> set pmpaddr0 to -1 and pmpcfg0 to napot rwx
<jrtc27> that's a simple "allow all the things" config
<jrtc27> (number of trailing 1s in pmpaddr encodes the length for napot, so all 1s gets you the entire space)
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<LordDoskias> jrtc27, so i added:
<LordDoskias> 0x000000008000003c <+60>:csrspmpcfg0,t4
<LordDoskias> => 0x0000000080000040 <+64>:lit4,-1
<LordDoskias> 0x0000000080000044 <+68>:csrspmpaddr0,t4
<LordDoskias> and now mret results in a trap again, but this time it's a supervisor external interrupt o_O
<LordDoskias> actually no, it's an environmental call from S-mode o_O
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<LordDoskias> ah right ...
<LordDoskias> my bad, everything works as expected now, thanks a lot for your help
<jrtc27> yw :)
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<muurkha> wonderful!
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<conchuod> bisecting on a bad pc sucks, by the time a build is done I've forgotten if I boot tested that hash or not
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<geertu> conchuod: uname -r doesn't show you the hash?
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<conchuod> geertu: don't get uname when you can't boot!
<conchuod> I mean, the PC doing the builds is bad
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<solrize> https://queue.acm.org/detail.cfm?id=3534854 this is kind of interesting. talks about an ancient OO computer with Ada primitives, and CHERI
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<conchuod> mmind00: smaeul how much of the d1 stuff is in -next?
<mmind00> conchuod: not that much I think ... the plic already has a compatible, but there is a series from smaeul pending doing more cleanups ... and what I remember from talking with Samuel, I guess the "biggest" fish is the pinctrl driver (there is a slight difference in register offsets compared to "standard" allwinner socs, which requires adapting the pinctrl driver)
* mmind00 is off to bed now :-)
<conchuod> plus maz has complaints about the irq patches
<conchuod> lol gn
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