sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<mps> somewhat strangely name with '86' which leads mind to 'x86'
zjason` is now known as zjason
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<diodesign> hi
<diodesign> ok, well, ircing from riscv hardware works (clockworkpi's riscv devterm)
<diodesign> which is nice
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<jimwilson> qwestion, it is the Chinese Academy of Sciences that is doing the AOSP etc work, they have employees and interns working on it, plus getting help from multiple Chinese companies, CAS work is open, Alibaba work may or may not be
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<conchuod> thats an oddly phrased question jim ha
<muurkha> maybe jimwilson was talking to qwestion
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