22:54 <anarsoul> what is the reason behind rockchip clock drivers using a table with precalculated pll params for different rates? what prevents the driver from calculating PLL params in runtime?

22:56 <CounterPillow> iirc, some of the SoCs cannot cleanly hit all of the rates a generic formula would spit out, and rounding errors makes this even worse.

23:00 <anarsoul> OK, why not to calculate PLL params if the rate is not in the table?

23:01 <anarsoul> it's still better than refusing to set required rate