mmind00 changed the topic of #linux-rockchip to: Rockchip development discussion | public log at https://libera.irclog.whitequark.org/linux-rockchip
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<warpme> guys: i'm hacking with adding cec support for rk3588 hdmi on 6.10-rc7 mainline. Hdmi code is https://gitlab.collabora.com/cristicc/linux-next/-/commits/b4%2Frk3588-bridge-upstream Cec kernel module is my backport from bsp. Module loads. Cec line (observed on osciloscope) has pulses when i'm issuing i.e. cec-ctl -d /dev/cec0 --phys-addr=1.0.0.0 --playback My issue is that timings are 2,9 times longer that should be (start bit is
<warpme> 10,7mS instead of 3.6; zero is 4.4 instead 1.5 while one is 1,7 instead of 0.6). This suggests me issue is cec clock isn't? But looking on bsp code https://github.com/radxa/kernel/blob/linux-6.1-stan-rkr1/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp-cec.c#L186 there is nothing with clock. So probably issue is in 3588 clk code. Has anybody any hint how to move forward with this?
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