narmstrong changed the topic of #linux-amlogic to: Amlogic mainline kernel development discussion - our wiki http://linux-meson.com/ - ml linux-amlogic@lists.infradead.org - official channel moved from Freenode - publicly logged on https://libera.irclog.whitequark.org/linux-amlogic
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<lvrp16> narmstrong: I don't see any logic in firmware/scp_task/pwr_ctrl.c for vrtc wakeup on the GXL series. is it somewhere else?
<lvrp16> ahh nvm, timera
<lvrp16> narmstrong: so they just renamed timera to vrtc after gxl?
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<narmstrong> lvrp16: the logic hasn’t changed at all, vrtc only sets this timera value
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<f_> Hey all. I'm done with pctl init. Will push and test!
<f_> Would be nice to have a memtest tool inside BL2, too, just in case.
<lvrp16> f_: yeah would be great to autotest for the eye.
<f_> The real question now is, how do I achieve that?
<f_> I could reuse Amlogic's port of a memtest tool for BL2, but meh. After seeing that many addresses weren't accessible I don't think it's very reliable.
<f_> Their memtest tool is just a port of a public domain memtest software.
<lvrp16> Not sure myself, linux-sunxi people did it before.
<f_> Not sure about the fact that it's just a port?
<lvrp16> I don't know how it applies to DDR4.
<f_> Despite the fact that gxbb BL2 supports LPDDR2 and LPDDR3, I think most (all?) gxbb boards use DDR3
<f_> well, I'm not aware of any gxbb board using LPDDR.
<f_> That's mostly the main mods Amlogic made to DDR init after BL2 sources were removed from the U-Boot tree
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<f_> I think the actual memtest source code is somewhere else in the U-Boot tree...such a mess.
<f_> >Copyright (c) 1998 by Michael Barr. This software is placed into the public domain and may be used for any purpose
<f_> The original seems to be available for download here: https://barrgroup.com/sites/default/files/memtest.zip
<f_> Now that I think about it
<f_> Figuring out BL2's base address on gxbb was easy, because of old sources, but chances are it might have been changed in gxl
<f_> If it changed I might possibly have a way to figure it out? Maybe?
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<f_> Ok. For now let's start without any memtest tool.
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<f_> https://git.vitali64.duckdns.org/misc/trustedfirmware-a.git/commit/?h=wip/gxbb&id=d24d3ff46ecf95fac284d29c37e423fe0abf4500
<f_> The memtest for now is.....if it can load the image then it's a success
<f_> Before, I was left with BL2 trying to load SCP_BL2 into memory using memcpy which crashed the board.
<f_> (so thought it was a memory issue)
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<f_> It compiled.
<f_> Time to test!
<f_> Fails to init PLL.
<f_> VERBOSE: DDR: Initialising PLL
<f_> That's all it prints
<f_> Along with
<f_> VERBOSE: Generic delay timer configured with mult=1 and div=24
<f_> before that
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<f_> Think I probably done something wrong.
<f_> It can't initialise.
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<f_> 7win 12
<f_> Whoops.
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<f_> I think I skipped some stuff.
<f_> Surprised pll_init in the old sources is documented
<f_> The code found by Ghidra is quite straightforward though.
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<f_> WHAT
<f_> IS
<f_> THIS
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<f_> I made it just run this:
<f_> printf("waiting for: ");
<f_> udelay(10000000);
<f_> printf("hello\n");
<f_> This is what I get:
<f_> waiting for:
<f_> GXBB:BL1<...>
<f_> Is that a....watchdog?
<f_> Or did I forget to init some stuff?
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