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<
f_ >
I'm pushing my updated notes to my git repo
07:39
<
f_ >
I think I'm going to take a ~1 day break from Amlogic though.
07:40
<
f_ >
only one day though
07:40
<
f_ >
(that means you'll see me spamming in #linux-amlogic tomorrow!)
07:40
* f_
decides to continue working on Amlogic stuff.
07:43
<
f_ >
Might take a break later
07:43
<
f_ >
but I really want to finish pctl init
07:43
<
f_ >
to then rage quit when it's not working.
07:43
<
f_ >
=) I like that
07:44
<
f_ >
and finally get it working and be very, very happy about the fact that you've done something incredible.
07:52
<
narmstrong >
f_: your work is entertaining !
07:55
<
f_ >
And I'll repeat the same process for gxl!
07:55
<
f_ >
create a Gerrit MR and call it a win!
07:56
<
f_ >
And I try to document as much as I can, too, so that people can e.g. port to other Amlogic SoCs!
07:56
<
f_ >
or learn how it works
07:56
<
narmstrong >
having this for gxl will be a great win because there's a lot of people with a gxl board (namely the potato) that would love that
07:56
<
f_ >
narmstrong: Wait and see!
07:57
<
f_ >
I'll most likely get both LePotato and LaFrite.
07:59
<
f_ >
probably next week though
08:00
<
f_ >
(still didn't bother about those yet..have some personal things to resolve first)
08:01
<
f_ >
(as in, didn't ask for those yet)
08:01
<
narmstrong >
if you need help on lepotato and larite => lvrp16 is the one who made those boards
08:01
<
f_ >
I'm aware of that, thanks!
08:01
<
f_ >
they actually PM'd me to tell me that they were interested in my work.
08:02
<
f_ >
(which I highly appreciate)
08:02
<
f_ >
and I really like what they're doing
08:03
<
f_ >
having a LePotato and LaFrite along with my KII pro sitting side-by-side =)
08:03
<
f_ >
Honestly though it shouldn't be hard to adapt BL2 for gxl
08:10
<
f_ >
But yeah I
*will* get a LePotato and LaFrite, that's for sure!
08:11
<
f_ >
And somehow I have SOIC clips for flashing flash chips so I can drop my BL2 in the SPI flash
08:12
<
f_ >
And flash with either a Raspberry Pi or the LePotato!
08:13
<
narmstrong >
nice! but with pyamlboot you can boot u-boot from usb and flash the spi, quite handy
08:14
<
f_ >
Should test it on my KII Pro someday
08:14
<
f_ >
maybe add support for it in pyamlboot
08:15
<
camus >
GXL and GXB use the same dwc ddr phy, but G12A/SM1 uses a different phy :(
08:15
* f_
still has to figure out how to send patches...They don't feel like signing in to GMail just to enter a code (2FA isn't even on)
08:16
<
f_ >
But I knew GXL and GXBB were similar!
08:16
<
narmstrong >
for g12a/sm1 they sideload ddr "blobs" into bl2, so I expect the ddr init code has been moved out
08:16
<
f_ >
I suppose their BL2 is still proprietary, right?
08:16
<
f_ >
Either way I expect the same codebase
08:17
<
narmstrong >
and they likely moved to a a more recent tfa since they support newer psci
08:17
<
f_ >
So what should be reverse-engineered would be the ddr blobs.
08:17
<
f_ >
narmstrong: Oh well
08:17
<
f_ >
So their codebase may be different?..
08:18
<
f_ >
Or they may have just imported newer code into TF-A like what they did with U-Boot for years.
08:18
<
narmstrong >
no idea, hard to say, probably a mix of both
08:18
<
f_ >
I unfourtunately don't own any G12A/SM1 board so can't tell..but I hope my reverse-engineering notes will be helpful for that
08:19
<
f_ >
still highly suspect they use mostly the same codebase since S905.
08:19
<
f_ >
narmstrong: But did generations earlier (Meson6, Meson8,...) use U-Boot SPL?
08:19
<
f_ >
I saw references to U-Boot SPL in Amlogic's older U-Boot tree supposedly targetting those SoCs.
08:19
<
narmstrong >
f_: no ide actually, xdarklight_ should be able to answer that question
08:20
<
narmstrong >
but it's probable yes
08:20
<
f_ >
Ah yes, xdarklight_ is working on Meson6 and Meson8 IIRC
08:22
<
f_ >
One little useless thing to tell before I go back to REing
08:22
<
f_ >
When looking at Amlogic devs emails I see they start with the same message lol
08:22
<
f_ >
> Thanks for your response
08:24
<
f_ >
Oh wait a second
08:24
<
f_ >
Just saw a spam email landing in linux-amlogic@
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<
f_ >
they did "obfuscate" some stuff
10:12
<
f_ >
Ghidra doesn't recognise the fact that this is a struct!
10:12
<
f_ >
because lVar2 is a `long`
10:12
<
f_ >
long thing = ddrt[3]; /* :P */
10:13
<
f_ >
struct ddr_timing_t ddrt;
10:14
<
f_ >
Ghidra has a neat data type manager
10:14
<
f_ >
It shows all struct members as well as addresses where they're located at!
10:19
<
f_ >
Have we got some Amlogic staff here though lol
10:19
<
f_ >
so sad that I'm reverse-engineering their blobs and understanding what they do :P
10:19
<
f_ >
(but hey, this is for an SoC no longer supported :P)
10:20
<
f_ >
(that's the good news, the bad news is that I'll adapt this for gxl)
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<
f_ >
>Pointer to pointer to ddrt[3]
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<
f_ >
Really, pointers that point to other pointers..
12:24
<
f_ >
There's a TON of that!
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<
xdarklight >
f__: indeed, IIRC 32-bit SoCs are using u-boot SPL. I'm not sure how relevant this is for GXBB and newer though because the 32-bit SoCs are booting to an Synopsys ARC HS core whose purpose it is to bring the ARM core up (and standby/wakeup management etc.)
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14:51
<
f_ >
I was just curious. Thanks!
14:58
<
f_ >
Found references to U-Boot SPL in an Amlogic fork and got confused. That's why I asked.
14:58
<
f_ >
Either way, thanks!
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<
f_ >
Got to go. Will push and disconnect.
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<
lvrp16 >
narmstrong: we got psci 1.0 on gxl
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