03:37 <davidlt[m]> rwmjones: your latest blog post is still going strong on the internet: https://www.youtube.com/watch?v=Dwj1-x9_Y4Q

04:32 <Entei[m]> davidlt: With the rebuilt glibc, I the C instructions seem to have disappeared. Of course I didn't inspect the whole objdump output, and this was just a simple hello world program, but still, it looks promising

04:32 <Entei[m]> s/I//

05:14 <davidlt[m]> Entei: you might want to write some script to inspect binaries for C instructions in binaries for some form of validation step.

05:15 <Entei[m]> Yes working on that

05:15 <davidlt[m]> Just remember that not all section in binaries are actually code :)

05:18 <Entei[m]> I did rebuild a simple package called banner, just takes a few mins to build. But that one is full of compressed instructions...

05:19 <davidlt[m]> Dump with objdump and investigate

05:42 <Entei[m]> The text section looks clean of compressed instructions.

05:51 <Entei[m]> Does glibc also require --with-arch to be specified? I assumed it's just bunch of libraries, so my gcc could take care of it while building.

07:49 <davidlt[m]> At the 1st glance it looks good.

07:50 <davidlt[m]> I don't recall (I constantly forget) what is location in every section.

07:50 <davidlt[m]> Remember that some of these are data, not actual instructions.

08:03 <Entei[m]> <davidlt[m]> "At the 1st glance it looks good." <- That's good to hear. Where do I go from here? Rebuild gcc again with bootstrap?

08:03 <davidlt[m]> I would pick a few more smaller packages to test, just to on a safe side.

08:04 <davidlt[m]> But in general you cannot avoid multiple phases, i.e. mass rebuilds.

08:04 <davidlt[m]> On the 1st mass rebuild you will not get "a clean non-C" build.

08:05 <davidlt[m]> On the 1st round you will be mixing C and non-C, but they use the same ABI thus no issues.

08:05 <davidlt[m]> The more iterations you will do the less there will be C. Most likely pretty much all of it will be gone after 2nd iteration (i.e. phase).

08:06 <davidlt[m]> But you need to have some form of metric to scan, and find the odd ones that managed to fall through the cracks somehow.

08:06 <davidlt[m]> It could be as stupid as objdump .text section and grep for "c." on every single ELF binary.

08:07 <Entei[m]> davidlt[m]: By mass rebuild do you mean all possible in the Rawhide image? Or just the core packages?

08:07 <davidlt[m]> And some point you will reconfigure QEMU VMs to drop C (probably after the 2nd phase).

08:07 <davidlt[m]> So if there are any C generated, that will cause illegal instruction (i.e. easy to notice).

08:08 <davidlt[m]> I would advice to start with packages in @core and then go a bit beyond incl. the most popular packages.

08:09 <Entei[m]> davidlt[m]: Yeah that's my plan as well. I observed qemu-system-riscv64 supports shakti-c core for emulation. It could make it easy to test

08:09 <davidlt[m]> Use virt machine, just change the CPU ISA.

08:12 <Entei[m]> davidlt[m]: Using virt machine. But the way I understood of doing it was passing `-cpu ` flag. It complained rv64g is not a supported core.... (full message at <https://libera.ems.host/_matrix/media/v3/download/libera.chat/c536bf3d8d86102020f3109cc949943a094eed39>)

08:13 <davidlt[m]> Yes, because it's not ISA.

08:18 <davidlt[m]> It should be (double check it): -cpu rv64,c=off

08:19 <davidlt[m]> rv64 is a type of CPU, then there is a ton of properties that you can toggle/set.

08:20 <davidlt[m]> See: https://github.com/qemu/qemu/blob/67fe6ae41da64368bc4936b196fee2bf61f8c720/target/riscv/cpu.c#L1595

08:20 <conchuod> There's an actual doc for that

08:21 <davidlt[m]> conchuod: Could you share it?

08:23 <Entei[m]> conchuod: yes kindly share. I've been searching couple of google pages with different terms, haven't found any documentation

08:23 <conchuod> davidlt[m]: Wait, no I got confused.

08:23 <conchuod> There's a doc for *some* of it, but not all. Specifically for AIA.

08:24 <conchuod> Sorry, jumped the gun a wee bit

08:29 <dtometzki> Hello together what are the issue of compressed instructions ?

08:29 <davidlt[m]> Entei is trying to build Fedora/RISCV with without C instructions. Whatever CPU he is working on doesn't implement it.

08:30 <davidlt[m]> He is also learning as he goes.

08:31 <Entei[m]> Aptly explained. :)

08:31 <davidlt[m]> IIRC you can query all CPU options via QEMU QMP.

08:32 <davidlt[m]> See: https://github.com/qemu/qemu/blob/master/docs/system/arm/cpu-features.rst

08:32 <davidlt[m]> Basically call query-cpu-model-expansion on rv64 and it will tell you what options and what are defaults.

08:33 <davidlt[m]> There is qmp-shell script available if you don't want to write calls in JSON :)

08:45 <conchuod> Yeah, I thought the riscv doc that that too, but it only has the aia options. FWIW, that's here: https://www.qemu.org/docs/master/system/riscv/virt.html#machine-specific-options

08:45 <davidlt[m]> That doc always seemed minimal to me.

10:27 <Entei[m]> <davidlt[m]> "It should be (double check it):..." <- This worked like a charm. Tested with my OE image. Thanks

13:50 <davidlt[m]> It's so hard to switch the keyboards. I feel like my typing skills went decades back. :D

13:52 <davidlt[m]> Especially going back to laptop time non mechanical keyboard.