<davidlt[m]>
I always considered Intel Thread Director just a step towards that. We already had SoCs that have different ISA in the cores, even Alder Lake P/E cores are different (AVX512 exist in P cores).
<davidlt[m]>
It's kinda a Holy Grail if you manage to schedule/balance across those cores.
<davidlt[m]>
Like most cores don't need AVX512 in them.