<set_>
I know I may cause some frustrations. Can anyone you know or you study while listening to gangsta rap?
<set_>
I am in the am335x TRM and listening to Gucci Mane. Impossible.
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<korenje>
hello
<korenje>
I see beaglebone project is still alive. That's good.
<korenje>
I hope new beaglebone black will be made with better hardware and exactly the same pin layout/functions
<korenje>
and in the future with fpga chip onboard :)
<zmatt>
fpga sounds highly implausible
<zmatt>
and you'll never have "exactly the same pin layout/functions" if you switch to a different SoC
<zmatt>
though TI's new cortex-a53 based AM625x SoC is highly backwards compatible with the AM335x in terms of peripherals and connectivity and appears to be positioned to be its successor
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<korenje>
everything is possible
<korenje>
just needs the same ammount of pins
<korenje>
if my beablegone stops working, my house stops working :)
<zmatt>
uhm what, no, different pins have different functions
<zmatt>
unless you only ever use them in gpio mode
<korenje>
I made a board with optocouplers long ago.
<korenje>
would be shame if I had to make a new one with the new board.
<korenje>
anyway if fpga was put on the board it would make it basically industrial PLC.
<korenje>
imagine plc with the size of a credit card
<korenje>
FPGA is highly programmable. basically you can do anything. meaning non-blocking communication
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<zmatt>
that doesn't answer the question... a PLC is normally just microcontroller-based, using an fpga sounds like an unsual design choice
<korenje>
no, basically all PLC have fpga inside which are programmed with "ladder logic"
<zmatt>
that's how it's programmed, it doesn't imply an fpga is used at all
<zmatt>
that "ladder logic" can, and as far as I understand typically is, still just evaluated by software
<zmatt>
on a cpu
<korenje>
ladder logic is for fpga based cpus. and industial PLCs need to have fpga chip for reliability.
<zmatt>
what does using an fpga have to do with reliability?
<korenje>
if you have 100 inputs how can you register input signal from all 100 inputs in 1 period?
<korenje>
yeah you can't without fpga.
<korenje>
in sequential processing it would take 100 clock periods at least
<korenje>
or cycles
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<ankur>
Hi, Actually u-boot and kernel source code are available. But primary boot loader i.e. firmware source code is not identifiable ? Can anybody help me by sharing the source of same ? For complete boot analysis , it is highly desirable.
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