ChanServ changed the topic of #armlinux to: ARM kernel talk [Upstream kernel, find your vendor forums for questions about their kernels] | https://libera.irclog.whitequark.org/armlinux
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<hauke1>
Hi, I have a device tree for an SoC which defines a bus with a bus mapping and it has this cadence SPI controller on it: https://elixir.bootlin.com/linux/v6.4/source/drivers/spi/spi-cadence-quadspi.c#L1675 The main register range is part of the memory range of the bus, but the second memory mapping is completly outside of the bus range, somehow the SoC designers put it somewhere else
<hauke1>
is it possible to tell in device tree to not use the bus mapping for one of the reg properties or should I just remove the bus mapping completly and it should not be used inside of SoCs?