whitequark[cis] changed the topic of #amaranth-lang to: Amaranth hardware definition language · weekly meetings: Amaranth each Mon 1700 UTC, Amaranth SoC each Fri 1700 UTC · play https://amaranth-lang.org/play/ · code https://github.com/amaranth-lang · logs https://libera.irclog.whitequark.org/amaranth-lang · Matrix #amaranth-lang:matrix.org
<cr1901> https://github.com/enjoy-digital/litex/pull/2174 Sentinel is now in LiteX, so it can now take advantage of basically any board supported by LiteX.
<cr1901> Since Sentinel requires Python 3.11, Amaranth requires 3.9, and LiteX can be used on as low as 3.8, I improvise by requiring a PEP 723-aware tool
<cr1901> (pdm or pipx work)
<cr1901> jfng: Would you like me to do the same and update Minerva while it's fresh in my head? May require some cooperation from you on the pythondata-cpu-minerva repo: https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/cpu/sentinel/sentinel-pep-723.py
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<tpw_rules> augh i still find shelling out to that stuff cursed
<tpw_rules> can't decide if it is better or worse than wget
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<cr1901> Maybe I could add a path that detects whether the appropriate deps are already present on your system, but relative to all other time spent generating a SoC, I don't think it's worth it
<cr1901> Anyways it's jfng's core, so his call. I'll just do the work if he doesn't want to
<tpw_rules> does pep 723 create a new venv just for that script?
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<tpw_rules> (or rather most pep 723 impls)
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<cr1901> yes, but it's cached so if you rerun the script, the venv is reused
<tpw_rules> ok, that's not so horrible. i thought it installed in the litex environment
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<jfng[m]> <cr1901> "jfng: Would you like me to do..." <- sure! if it is not too much work for you; let me know if you need anything on minerva's side
<jfng[m]> i guess the only changes would be to connect the IRQ lines to minerva's `fast_interrupt` ports, and use the upper 16 bits of the mip/mie CSRs in the interrupt handling code
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<cr1901> If you want a quick test I tested with "python -m litex_boards.targets.gsd_orangecrab --cpu-type minerva --output-dir build/orangecrab-minerva --build"
<cr1901> And yes, moving the IRQ lines and changing the interrupt handling code are all I had to do
<jfng[m]> thanks! there have been minor commits to minerva today, that you may want to pull also
<cr1901> Will do, especially considering that CI is failing and I have to debug that :P https://github.com/enjoy-digital/litex/actions/runs/13421322078/job/37494414900?pr=2189#step:7:278
<cr1901> jfng[m]: Brought in new changes, and adjusted register names
<cr1901> I STG if I get bit by cp1252 one more time...
<cr1901> (Turns out "ç" in "Jean-François" is a valid cp1252 char. With a different value than in UTF-8. Go figure)
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<galibert[m]> Cp1252 iirc is very different from latin-1, and Unicode 0-255 matches latin-1
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