<cr1901>
I understand why warning about this can't be done, but it's been "0" days since I got bit by "you forgot to call add_clock in the simulator", and wondering for several minutes why ctx.tick() was hanging...
<cr1901>
Inside a testbench, I have: "await ctx.tick().until(m.fetch.ack == 1); assert ctx.get(m.fetch.ack) == 1". This fails because I have a _process_ simulating a Wishbone memory in Python code, and it runs "ctx.set(m.bus.ack, 1)
<cr1901>
; await ctx.tick(); ctx.set(m.bus.ack, 0)" before the process wakes up. 1/2
<cr1901>
before the testbench* wakes up
<cr1901>
What recourse do I have to make the testbench see m.fetch.ack == 1 before the simulated process wakes up first (I guess the answer is "you can't do this")?
<cr1901>
(Alternatively, "why are 'while ctx.get(m.fetch.ack) != 1:
<cr1901>
await ctx.tick()' and 'await ctx.tick().until(m.fetch.ack == 1)' not equivalent"?