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<cr1901>
jfng: Should I interpret this commit comment as "Minerva uses to use custom CSRs for interrupt handling, now it uses the top 16 lines or the arch-dedicated MachineExternal line"?
<cr1901>
jfng[m]: For context, I'm porting Sentinel to litex, and am using Minerva for help. Depending on how irritating it is, I'll also do a PR to update Minerva from the old interrupt method to the new one
<cr1901>
Depending on how irritating the Sentinel port* is. LiteX doesn't seem to like that I didn't implement the top 16 IRQ lines
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