<Chips4MakersakaS>
<whitequark[cis]> "and it could be prototyped..." <- I had to subclass the XilinxPlatform class to be sure the PS clock pin gets the right annotations in the output files for Vivado to be able to do it's thing.
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<whitequark[cis]>
yep, I'd expect something like that would be needed
<whitequark[cis]>
also, I think resource assignment gets kind of weird with PS
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<Chips4MakersakaS>
My idea was that the class would define resources like the memory interface etc. and you could `request` them as other resources defined in amaranth-soc in your code. The class would then take care of instantiating the PS. I only have defined the PS clk pin for now and nothing else yet...
<Chips4MakersakaS>
And I will be focusing on other things for the moment.
<Chips4MakersakaS>
s/soc/boards/
<whitequark[cis]>
yeah that would be my idea too, for when it's integrated upstream
<whitequark[cis]>
unfortunately i haven't really used SoC FPGAs much
<galibert[m]>
You need a de10-nano?
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<whitequark[cis]>
i need more free time when i'm not in pain
<whitequark[cis]>
i have enough boards
<Chips4MakersakaS>
<eigenform[m]> "on the topic of zynq parts..." <- eigenform: Do you plan to use Amaranth with Zynq in near future ?
<tpw_rules>
i still need to upstream my de10 nano stuff
<tpw_rules>
(and migrate to streams) but i think it's not a bad pattern and would at least like to bring it to the discussion table. there's some weird junk with internal logic i remember not being sure how to solve nicely
<tpw_rules>
but it works very well
<galibert[m]>
Catherine: that's... harder to provide, sadly
<eigenform[m]>
not for anything practical, but i do have one of those digilent zybo boards
<eigenform[m]>
i'll probably try to play around with it sometime soon
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