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[amaranth-lang/amaranth-lang.github.io] whitequark c370382 - Deploying to main from @ amaranth-lang/amaranth@aaec7e0d276b88dfb08e5f6bcb1db5279ceca242 🚀
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[amaranth-lang/amaranth-lang.github.io] whitequark d79c8e4 - Deploying to main from @ amaranth-lang/amaranth@29502442fba903f3476b9fcecc77153e6b54dfd4 🚀
<whitequark>
it's official: as of yesterday, I'm working full time on Amaranth together with Chipflow (https://chipflow.io)
<whitequark>
you can expect a faster pace of development, much anticipated features being shipped, weekly meetings once again, and more
<adamgreig[m]>
congrats!
<whitequark>
to be clear, Amaranth remains an independent, community driven open source project; nothing actually changes there other than my contributions now being (c) Chipflow
<adamgreig[m]>
are you all moved? hope it went ok!
<d1b2>
<TheZoq2> 🎉
<Sarayan>
wq: excellent
<Sarayan>
you moved to uk or somewhere else?
<Sarayan>
-soc question: I see classes to handle a "bare" wishbone bus and structures for a csr bus build on top of it. What's a csr bus in that context?
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[amaranth-lang/amaranth-lang.github.io] whitequark 65d5be8 - Deploying to main from @ amaranth-lang/amaranth@f133646e9bfc0250cb9d911cfbfd4f14cdce0937 🚀
<Sarayan>
wq: ok, what does it mean in practice, what does that specific set of classes provide over the whole bus? The code is a tad opaque :-)
<whitequark>
if you have a bunch of simple registers in a peripheral (think an UART or a timer or something) then you don't need the whole set of Wishbone bus signals
<whitequark>
in addition, you might want to e.g. have 64 bit peripheral registers even on a 8 bit Wishbone bus
<whitequark>
the CSR to Wishbone translator handles all that
<Sarayan>
csr to wishbone or wishbone to csr?
<whitequark>
wishbone initiator to csr target
<whitequark>
so your peripheral speaks CSR and then in your SoC you have CSR to Wishbone or AXI4 or something translator
<Sarayan>
my current use case is taking a minerva core (riscv with two wishbone masters) and plonking things it its memory map (on-die ram for boot instructions, sram and dram on the board, smattering of peripherals and eventually the structures I want to test)
<Sarayan>
(the structures being neural networks, GRU to be precise, AI is fun :-)
<whitequark>
so you want on-die RAM to be on the Wishbone bus, some sort of SRAM/DRAM controller on the Wishbone bus, and the bunch of peripherals on the CSR bus
<Sarayan>
okay
<Sarayan>
that makes sense
<Sarayan>
when I'm done I need to write all that down with examples in a doc to put in amaranth-soc
<whitequark>
I'm going to be writing that doc most likely
<Sarayan>
that would be nice, the doc really needs to exist in any case :-)
<whitequark>
in general I'm quite particular about how I want the docs to look like, so unless you're willing to do a lot of back-and-forth or are fine with just a full rewrite without it even being merged probably don't bother
<whitequark>
at some point I'm going to document how I want the documentation to look like
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[amaranth-lang/amaranth-lang.github.io] whitequark 0d7834e - Deploying to main from @ amaranth-lang/amaranth@7044e091106ee3a1d477ee53df84f8f0738fbd32 🚀
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[amaranth-lang/amaranth-lang.github.io] whitequark c98d5bb - Deploying to main from @ amaranth-lang/amaranth@de8846ea848a1dcab0e8e6d6d46b90aa6d097d19 🚀
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[amaranth-lang/amaranth-lang.github.io] whitequark d158fea - Deploying to main from @ amaranth-lang/amaranth@7bf15bc466b428f5c402365d79222122f90f1447 🚀
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[amaranth-lang/amaranth-lang.github.io] whitequark 9d90e05 - Deploying to main from @ amaranth-lang/amaranth@db509db0b1bf63aa77e9a2552d0986c9b0472e0d 🚀
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[amaranth-lang/amaranth-lang.github.io] whitequark df1555f - Deploying to main from @ amaranth-lang/amaranth@47551e8c713a90f2656e41ca07f8197ee6a3d771 🚀
Guest61 has joined #amaranth-lang
<Guest61>
wow, way more twitter mutuals than i'd have assumed here
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[amaranth-lang/amaranth-lang.github.io] whitequark 03558be - Deploying to main from @ amaranth-lang/amaranth@5a79c351e30b5741fbc07c7dbb44cdfecc7e5a44 🚀
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[amaranth-lang/amaranth-lang.github.io] whitequark 19e07e2 - Deploying to main from @ amaranth-lang/amaranth@9102738274082ea4303438cc2365b1bbbedbbd09 🚀