<dave berkeley> I'm trying to integrate some Amaranth code into Litex. The Amaranth side of things is fine - generating Verilog is simple. I've also written some code to use reflection to analyse the Elaboratable I want to use, which can generate a Python stub that invokes a migen Instance and creates a wrapper Module around it, adding in the clk and rst signals. It seems to work okay. My test free running counter works. But I'm having trouble
finding my way round Litex. I want to connect a wishbone bus to my module. Is there an equivalent place to this discord group for Litex?