<Peng_Fan>
The main issue SDHC not able to access secure memory in SPL stage, so need use a buffer to copy what SDHC loaded to secure memory(ATF/TEE)
<marex>
Peng_Fan: OK, here is a question ... my understanding of the S/NS stuff is this:
<Peng_Fan>
sure, please pick the usb patches via your tree.
<marex>
you have RAM ... say from 0x0000_0000...0x8000_0000 (for simplicity sake)
<marex>
you have Secure RAM ... say from 0x0000_0000...0x2000_0000 (for simplicity sake)
<marex>
you have Non-Secure RAM ... say from 0x2000_0000..0x8000_0000 (for simplicity sake)
<marex>
yes ?
<Peng_Fan>
yup
<marex>
and the SDHC controller can only write to Non-Secure RAM, yes ?
<Peng_Fan>
right
<marex>
but, you need to place blobs into Secure RAM, yes ?
<Peng_Fan>
right
<Peng_Fan>
Except U-Boot in non-secure RAM, ATF/TEE are in secure RAM.
<marex>
so ... use the regular SPL loader -- whichever one you need, SDMMC, SPI, any of them ... and load the blobs into Non-Secure RAM first (Step 1)
<marex>
and then, step 2 , implement spl_perform_fixups() to copy the blobs from Non-Secure RAM to Secure RAM
<Peng_Fan>
But the address where to put the blobs are coded in containers entry/load address.
<marex>
Peng_Fan: which container is that , fitImage ?
<Peng_Fan>
imx container format.
<Peng_Fan>
marex, should be spl_imx_container.c.
<marex>
Peng_Fan: is it only the uSDHC that is affected by this problem, or also some SPI (FSPI/QSPI/whatever is in the MX95) ?
<Peng_Fan>
others are also affected. If the IP is expected to be used by Linux later.
<Peng_Fan>
If the IPs are only expected to be owned by secure world, the IP could be set as secure master in TRDC.
<Peng_Fan>
But since SDHC is also used by Linux, so it is set as non-secure master in TRDC.
<marex>
hmmmmmmmmmmmm
<marex>
the other alternative that came to mind was to implement bounce-buffer-like thing in the SDHC driver
<marex>
we already have that in common/bouncebuf.c for handling of unaligned IO and 32bit boundary stuff
<Peng_Fan>
SDHC driver will also be used by U-Boot in non-secure env.
<Peng_Fan>
If doing that in SDHC driver, we need restrict that with CONFIG_XPL to use bound buffer.
<marex>
sure, but it could allocate a bounce buffer in NS area, load stuff into it, and if the destination buffer is S area, then it can do the extra memcpy
<Peng_Fan>
this sounds feasible
<marex>
would that be an option ?
<marex>
oh, cool
<Peng_Fan>
marex, we will give a look. Thanks
<marex>
and bonus thing is, you would be able to reuse that same bounce-buffer-like code for other drivers too
<marex>
I got USB 2.0 and 3.0 going, now waiting for the kernel DTs to get synced so the USB DT nodes would land
<Peng_Fan>
marex, sure, thanks for working on the i.MX95 stuff.
<Peng_Fan>
great!
<marex>
I also got ethernet working, but that is ugly so far
<marex>
I'll post patches once I clean that up
<marex>
that netc block controller will need a separate driver in some SIMPLE_BUS uclass
<Peng_Fan>
the enetc code is not in good shape, thanks if you would work on that.
<marex>
Peng_Fan: also thank you and Alice :)
<Peng_Fan>
pleasure!
<marex>
Peng_Fan: oh btw. how do you figure out the layout of what is S and what is NS memory ?
<Peng_Fan>
marex, it is coded in TRDC MRC
<Peng_Fan>
In SM configs/mx95evk.cfg
<marex>
is there some way U-Boot can query that information , e.g. via PSCI/SCMI/SMC ?
<marex>
or can that information be somehow passed to U-Boot ?
<Peng_Fan>
There is an entry named "DDR EXEC, begin=0x080000000, end=0x089FFFFFF"
<Peng_Fan>
Currently the TRDC is not allow Cortex-A to access, so no way for U-Boot to query
<Peng_Fan>
I was thinking to expose TRDC for A55 to read, but have not started on that
<marex>
Peng_Fan: can you use the mailbox/mu interface you already have in place and only extend it ?
<marex>
you will have to get this information to the SDHC driver somehow, possibly by placing it in DT (with binding that is acceptable in Linux too) , or by querying that information from the SM firmware , or something
<marex>
hard-coding it into U-Boot binary itself is ... not nice
<Peng_Fan>
marex, you mean not use imx-mailbox.c?
<Peng_Fan>
For secure/non-secure memory, we will give a check, but since TRDC is blocked to access by A55, so no way as of now.
<marex>
Peng_Fan: I mean, yes, use -- either the communication channel on top of imx-mailbox.c (which I think uses the iMX MU?) -- or -- put S/NS layout information into U-Boot control DT (if the first option is not possible)
<marex>
Peng_Fan: I mean, yes, use -- either the communication channel between U-Boot and SM on top of imx-mailbox.c (which I think uses the iMX MU?) -- or -- put S/NS layout information into U-Boot control DT (if the first option is not possible)
<marex>
there, that's clearer I hope
<Peng_Fan>
I see. thanks. Need leave for a while.
<marex>
Cheers, talk to you later
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<Tartarus>
marex: Did you try "Makefile: Make sure all linker input objects exist" with "make O=/tmp/board" ? That's to fix the issue you talked about with nothing being built in board/$(VENDOR)/common/ yes?
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<marex>
Tartarus: I tried it in CI. No, I didn;t try make O=/path locally, why ?
<marex>
Tartarus: yes
<Tartarus>
OK, CI does that too
<marex>
Tartarus: yes, that's to fix the board/vendor/common stuff with empty Makefiles
<Tartarus>
And I was worried that the touch rule might not make the directory structure
<Tartarus>
But I guess that's make's touch and not shell touch
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<marex>
Tartarus: ha
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<Tartarus>
My only other concern is that it might be wall-clock expensive doing so many "touch" operations in CI builds, can you point me at the pipeline you tested this in please?
<Tartarus>
And that's within the margin of normal build time
<Tartarus>
in fact looking slightly closer, the build itself was shorter on with than without the change, the rest was the time and tooling around CI itself.
<marex>
mkorpershoek: hey, can you please check the "gadget: composite: add checking for interface number" patch ?
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<rfs613>
marex: have just spotted your commit aad511a488c ARM: dts: renesas: Switch to using upstream DT
<rfs613>
and i see you have noted RZN1 snarc doesn't have an upstream dts file
<rfs613>
i guess we should fix that at some point... it's quite similar to r9a06g032-rzn1d400-db.dts
<marex>
rfs613: yes please, the sooner the better :)
* rfs613
will need to figure out what is the process for that ;-)
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<marex>
rfs613: get the DT into Linux, wait for it to trickle into U-Boot, then flip OF_UPSTREAM in your board config and remove local DT copy
<rfs613>
yup, that much I figured ;-) it's the details of running that gauntlet that will probably be unpleasant ;-)
<shadow>
rfs613: I'm doing the same for Milk-V Mars CM (-Lite)
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