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<ALTracer>
cache flush should happen after registers spill out of any LSU write buffers, similarly cache purge needs to complete before you access cacheable packet bytes
<ALTracer>
dsb affects the pipeline, I think, dmb only LSU
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<calebccff>
he more or less said that the way u-boot is handling DMA now means drivers like dwc3 will always be broken on coherent or incoherent systems, since we don't respect the dma-coherent property in DT
<calebccff>
so we get patches that fix drivers for one architecture and end up breaking it for others
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<rfs613>
okay, dumb question time: what actually triggers a driver's probe() method?
<rfs613>
i've added my PCS driver using UCLASS_PHY for the moment... bind() is happening, I can see it listed in "dm tree", but its probe() function is not being called
<rfs613>
parent node is 'soc' and it has many other devices (like some ethernet GMAC, etc) which are all being probed successfully
<calebccff>
rfs613: drivers are probed lazily, either from something explicit like when you run the "usb" command it probes all USB host controllers, or because it's a dependency of somethiing that gets probed (like the usb controller references it's phys and when it tries to fetch them they get probed automatically)
<calebccff>
what's the phy for?
<rfs613>
it's not really a phy, but rather a MII/GMII/RGMII converter block... it sits betwen the GMAC and the actual PHY (or in this case, a switch).
<calebccff>
rfs613: this relationship should be modelled in DT right?
<calebccff>
like maybe the GMAC should reference it and it should reference the actual phy
<rfs613>
yep, it will be, though it's not a direct heirarchy
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