#u-boot on 2025-01-09 — irc logs at libera.irclog.whitequark.org

2025-01-07 00:56 Tartarus changed the topic of #u-boot to: SOURCE MOVED TO https://source.denx.de/u-boot/u-boot.git / U-Boot v2025.01 is OUT / Merge Window is OPEN, next branch is CLOSED / Release v2025.04 is scheduled for 07 April 2025 / Channel archives at https://libera.irclog.whitequark.org/u-boot

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03:32 <ALTracer> cache flush should happen after registers spill out of any LSU write buffers, similarly cache purge needs to complete before you access cacheable packet bytes

03:34 <ALTracer> dsb affects the pipeline, I think, dmb only LSU

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16:23 <Slimey> howdy everyone

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16:26 <calebccff> moin

16:29 <calebccff> marex: i got talking to Ahmad at 38c3 about DMA and cache coherency, we should steal some barebox APIs.... look they have sane and linux-compatible abstractions for DMA https://github.com/barebox/barebox/blob/master/arch/arm/cpu/mmu-common.c

16:31 <calebccff> he more or less said that the way u-boot is handling DMA now means drivers like dwc3 will always be broken on coherent or incoherent systems, since we don't respect the dma-coherent property in DT

16:32 <calebccff> so we get patches that fix drivers for one architecture and end up breaking it for others

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