18:19 <hexdump0815> tagr: digetx: i'll test whatever you decide to finally implement regarding the display fix for nyan during the next days then

18:21 <hexdump0815> tagr: while we are at nyan - do you maybe have an idea why u-boot if chainloaded from depthcharge is not able to properly initialize the display on the 1366x768 model of nyan big? it is just flickering wild in this case

18:21 <hexdump0815> the kernel is working fine on this model and u-boot works fine on the full hd version of the nyan-big and on nyan-blaze with a 1366x768 panel

18:23 <hexdump0815> the panel timings defined in the u-boot dts are for 1366x768 (only) and they match the used timing i for instance get out of xrandr when running xorg later exactly

18:52 <kwizart> hexdump0815, u-boot has its own dtb IIRC, but I wonder if using edid would help in this case. I know edid support in the tegra-drm uboot would help (at least on paz00 where many have changed the default display)

19:32 <tagr> I've never worked with U-Boot's display support, but I know from working on the Tegra DRM bits that this can be a bit fiddly to get right

19:32 <tagr> is it flickering but sometimes showing correct content or is it all wrong?

19:34 <tagr> EDID is not necessarily going to help, if the programming sequences are wrong it isn't going to work no matter what mode you try to set

19:47 <jonasschwoebel[m> <hexdump0815> "tagr: while we are at nyan..." <- On Surface RT the backlight only turns on at ~80% pwm duty cycle.

19:47 <jonasschwoebel[m> Below the backlight flickers. Not sure if this is what you meant.

19:47 <jonasschwoebel[m> But setting the duty cycle high enough fixes the problem.

20:53 <hexdump0815> kwizart: yes i ment the u-boot dts for nyan-big - in there is a panel timing for 1366x768 defined

20:55 <hexdump0815> tagr: it is flickering allways and the whole time while u-boot is active

20:56 <hexdump0815> jonasschwoebel[m: it looks more like not getting the timings right than like a problem with the backlight - but who knows ... do you have an example of how to play with the pwm duty cycle?

20:57 <hexdump0815> the strange thing is: it flickers like crazy if that (proably correct) panel timing is in the dts and if i remove this timing it only flickers once at the beginning and is calm then (still no display output though)

20:58 <hexdump0815> i think the flickering is more like some mode switching flicker

20:58 <jonasschwoebel[m> Write the pwm register directly. The uboot pwm stuff didn't work Iirc.

20:58 <jonasschwoebel[m> Or just set the brightness to max in the devicetree.

20:59 <tagr> there's no such thing as "mode switch flicker", really

20:59 <tagr> at least not with eDP

20:59 <hexdump0815> tagr: i just tried to describe how it looks like

21:03 <hexdump0815> this is the timing entry in the dts btw.: https://github.com/u-boot/u-boot/blob/master/arch/arm/dts/tegra124-nyan-big.dts#L35-L45

21:04 <hexdump0815> i compared the values with what xrandr shows me in xorg and they are all exactly the same

21:09 <tagr> yeah, I don't think it's a problem of the values not being correct, but rather how the values are programmed

21:10 <tagr> or it could have something to do with the power sequencing, so perhaps that's something else to look at

21:11 <tagr> regulators aren't exactly one of U-Boot's stengths