sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv | Matrix: #riscv:catircservices.org
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<bjdooks> I forgot how slow make -j1 is on a modern kernel
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<drewfustini> Try -j128 :)
<drewfustini> Yeah sometimes I forget to add -j and I am like what's wrong?
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<bjdooks> drewfustini: i was trying to get some reasonable error reporting out without the messages being mixed up
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<drewfustini> Ah makes sense
<geertu> drewfustini: -j128 works reasonably well on a sytem with an SSD and 64 GiB of RAM ;-)
<bjdooks> and 128 cores helps too
<drewfustini> :)
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<smallville7123> hi
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