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<palmer>
arnd: you're OK with this Renesas DMA stuff that just got re-spun?
<arnd>
palmer, prabhakar: sorry, I'm travelling at the moment, so I'm slow to reply to email. I had a look now, and all the riscv bits seem fine. I'd like the code that I had added to include/linux/dma-sync.h to just be part of arch/riscv/mm/dma-noncoherent.c for now
<palmer>
arnd: OK. Do you want someone to re-spin it for you?
<arnd>
hch had complained about C code in a header, and I agree that this is ugly. I was planning to change that for my follow-up that I hadn't gotten to, but just having the same code in arch/riscv should be fine
<arnd>
maybe prabhakar can just rework the patch to move this to arch/riscv and point to my original patch, describing the new version as "based on"
<palmer>
prabhakar: are you OK doing that? the merge window is approaching... ;)
<prabhakar>
arnd palmer: sure I can respin it today.
<palmer>
thanks
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<courmisch>
looking at the "Compiler details", I see no tuning and Zba and Zbb disabled...
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<palmer>
courmisch: there's a ton of performance issues in SW land, we've just put together the bare bones of a stack because there's not that many people involved
<courmisch>
well yes that too but compiler engineers are few and far between, and they probably don't work for free :/
<courmisch>
(in fact, my boss is looking for one, and that's *not* to work on RISC-V)
<courmisch>
palmer: by the way, is it just me misunderstanding subtle semantics, or GCC and Clang don't cope very well with the fact that RV uses sign extension instead of zero extension for narrow arithmetic?
<jrtc27>
example of a situation where they don't cope well?
<courmisch>
I didn't keep code, but it seemed that it was forcing conversion from signed to unsigned or vice versa even when it was semi obviously not needed in scope
<courmisch>
it's possible that I was relying on out-of-band knowledge unavailable to the compiler though. I don't recall exactly. That's why I'm asking
<courmisch>
so I was suspecting that LLVM and GCC were written with x86 in mind, and that somehow didn't work out too well on RV, maybe
<jrtc27>
I don't know of any serious issues in LLVM
<jrtc27>
there may be specific cases that crop up in certain software that need recognition
<courmisch>
it's quite possible that I only looked at GCC, in hindsight
<jrtc27>
but without concrete examples I can't offer anything more than that
<courmisch>
or that it just got fixed with updates
<courmisch>
I just wanted to know if it's a known issue. Seems not, so probably it's not or no longer an issue
<jrtc27>
I can't speak for GCC
<courmisch>
though then, I wonder what palmer is alluding to that's missing to the stack, aside from JITs and vector kernels
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<Tenkawa>
comparing these to an 8 core rk3588 is ridiculous for one
<Tenkawa>
(Orange Pi 5)
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<Tenkawa>
I have several 3588 and 3588s machines and they are of course going to from a cpu/threads standpoint run away from the VF2
<Tenkawa>
Even the RPI4 (BCM2711) is one of the strongest 4 core machines out there if not a bit on the excessively closed side..
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<sorear>
mips64, alpha, and loong64 have the same behavior, and most of the avoidable cases are already handled
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<Tenkawa>
Anyone have any insight on this one? (more if it has been patched/fixed yet) Error: unrecognized opcode `clz t1,t1', extension `zbb' required
<Tenkawa>
just a simple test on a JH7110
<Tenkawa>
Someone was asking me to recreate it and I have on both of mine (Star64 and VF2)
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<sorear>
do you have more context? as an assembler error message it seems self-explanatory
<Tenkawa>
sorear: I agree.. but isn't zbb in standard binutils?
<Tenkawa>
it was just the following code
<sorear>
clearly yes, if it wasn't in standard binutils the error message would just say it was unrecognized without naming an extension?
<Tenkawa>
main:
<Tenkawa>
.globl main
<Tenkawa>
jr ra
<Tenkawa>
clz t1,t1
<Tenkawa>
Thats why I'm puzzled why its saying the extension is missing
<sorear>
are you passing an option to as to enable zbb?
<sorear>
for gcc it would be -march=rv64gc_zbb but I'm not sure about the as native option
<Tenkawa>
good point (not my code btw.. I was just passing this along)
<Tenkawa>
that worked,.. thanks sorear
<Tenkawa>
as -march=rv64gc_zbb test.asm worked
<jrtc27>
please use gcc/clang as your assembler frontend
<jrtc27>
as is a terrible interface and not portable to non-gnu binutils
<Tenkawa>
sorear: I knew these nuances in the compiler/build flags years ago but am so rusty since I'm out of the industry....
<jrtc27>
and probably defaults to the wrong ABI
<Tenkawa>
jrtc27: as the saying goes "DSTM"
<jrtc27>
so pass it back? :)
<Tenkawa>
I am
<Tenkawa>
:)
<jrtc27>
thanks
<Tenkawa>
Can I copy/paste directly to get it right?
<jrtc27>
my messages? sure
<Tenkawa>
Thanks.. much appreciated
<jrtc27>
in this case the channel has public logs anyway
<Tenkawa>
he was using gcc
<Tenkawa>
as was just a test case
<Tenkawa>
He didn't realize as was "not" part of gcc source
<Tenkawa>
and binutils specificly
<Tenkawa>
He had been running it from gcc
<jrtc27>
ack
<jrtc27>
it's true that most people conflate the two
<jrtc27>
(and why wouldn't you? nobody's using clang to assemble gcc-produced files...)
<Tenkawa>
Most people though think that as/ld/gold "are" gcc...
<Tenkawa>
which they aren't
<Tenkawa>
(at least users in the non-dev world )
<muurkha>
jrtc27: it used to be pretty common to use non-GNU assemblers to assemble gcc-produced files, and I pretty often use gas to assemble files that aren't produced by GCC
<muurkha>
admittedly I often invoke gas via /usr/bin/gcc in those cases ;)
<jrtc27>
yes, in ye olde days, you'd often use some vendor assembler
<jrtc27>
but the kinds of devs we're talking about who don't know that binutils != gcc aren't in that situation
<jrtc27>
and of course gas assembles non-GCC files, it assembles human-produced ones :)
<Tenkawa>
jrtc27: sounds like my days at AT&T/Lucent
<jrtc27>
(and, less facetiously, clang-produced ones with -fno-integrated-as, which can be the default for odd architectures)