sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<muurkha> automake makes everyone sigh
<mictty> what about it
<dh`> next step, arguing with cmake
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<bjdooks> superscalar cpus... so hot right now
<another|> Add watercooling
* muurkha multiplies watercooling with the Zmmul extension
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<kaaliakahn> what interface is needed to connect RISCV CPU to external memory?
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<kaaliakahn> what interface is needed to connect RISCV CPU to external memory?
<drewfustini> HiFive P550 announced:)
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<muurkha> drewfustini: yay!
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<Reinhilde> kaaliakahn: it depends on the individual processor
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