klange changed the topic of #osdev to: Operating System Development || Don't ask to ask---just ask! || For 3+ LoC, use a pastebin (for example https://gist.github.com/) || Stats + Old logs: http://osdev-logs.qzx.com New Logs: https://libera.irclog.whitequark.org/osdev || Visit https://wiki.osdev.org and https://forum.osdev.org || Books: https://wiki.osdev.org/Books
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<moon-child> cost of communicating between core m and core n
<geist> yep, that's a neat graph huh?
<Mutabah> shows some interesting patterns
<geist> yah ti's showing you the other half ot e same core (7 ns), cores sharing the same L3 on the same zeppelin (18ns or so)
<Mutabah> e.g. threads 48-64 have a large latency to everything except their "cluster"
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<geist> then you start hopping out and you're talking to the nearby zeppelins with their own L3
<geist> then there's a second hop (second IO die i think?) to the far cluster of zeppelins
<geist> i guess these are zen 1/2 cores since they still have 4 cores per L3
<geist> ah this is what i was looking for
<geist> https://images.anandtech.com/doci/16214/CC3950X.png is a 3950x (zen 2) and you see it looks similar
<geist> https://images.anandtech.com/doci/16214/CC5950X.png 3950x (zen 3) you see that now each 8 core cluster has an L3
<geist> also interesting on the 3950x that though there are two cpu dies, each with 2 clusters of 4 cores (with an L3), the shared clusters on a die aren't any closer to each other
<geist> ie, all of the other 3 L3s are equally far apart, and must go through the io die
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<graphitemaster> So like, it's obvious any n-dimensional array and n-dimensional index for that array can be trivially made into a 1-dimensional array and 1-dimensional index, duh. What surprised me is how trivial it is. I used to have to sit down and think about it eveytime for 2D and 3D and what not, but it turns out there is a stupid simple general solution for it that I've been avoiding all these years
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<graphitemaster> int index = 0; for (int i = 0; i < dimensions; i++) index *= SIZE[i], index += INDICES[i];
<graphitemaster> It's just *= size, and += indice, like wtf!?
<graphitemaster> Reverse the loop and you get the column-major version instead of row-major
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<graphitemaster> int array[A][B][C][D] => int array[A*B*C*D], indices = (a, b, c, d), easy, int i=0;i*=A,i+=a,i*=B,i+=B,i*=C,i+=c,i*=D,i+=d;
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<graphitemaster> s/+=B/+=b/
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<heat> i'm taking the time to go back and document most of my code and functions. funny how much ???? code I've already found
<heat> looking back and seeing how stupid past you was is a nice exercise
<sortie> Totally hear you heat :)
<sortie> Any good gems you found?
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<heat> hmm, maybe not so much in horrible horrible code but a lot of bad APIs and functions that should not be a thing
<heat> just in a single header file lol
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<heat> one of the great lessons I'm learning in GSOC is that documenting your own code and writing it in a clear way is really important
<heat> so I'm trying to retro-fit that concept in my OS
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<dzwdz1> does the multiboot standard provide a way to find out the first unused memory address?
<dzwdz1> accounting for kernel modules, all the strings provided by the bootloader, etc
<heat> no
<heat> you'll need to account for those yourself
<heat> the memory map is literally what the firmware says it is
<heat> everything passed by the bootloader is "free" in the memory map(your kernel should be part of the free regions too)
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<mjg> geist: do you know by any chance where i can find optimized string routines for armv6? (e.g., cortex-a9)
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<geist> mjg: hmm
<geist> they just dont have any 32bit routines in there?
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<geist> https://github.com/ARM-software/optimized-routines/tree/master/string/arm looks like they'd be fine. at least a couple of them
<bslsk05> ​github.com: optimized-routines/string/arm at master · ARM-software/optimized-routines · GitHub
<geist> note: cortex-a9 is armv7
<geist> a8 and a9 were the first two of the armv7 cores. all the armv6s were pre-cortex
<geist> (yeah yeah except cortex-m0, but thats a weird odd duck)
<mjg> sorry, for got to say exactly
<mjg> i need memcmp :)
<mjg> quite a bummer they don't have it there
<heat> mjg, steal musl's
<heat> MIT licensed so it should be ok
<heat> ok they don't have memcmp
<heat> well, rip
<mjg> :)
<heat> neither does glibc
<heat> memcmp is officially unoptimisable for arm
<geist> bionic maybe
<geist> well, possible there's not really much special you can do
<geist> i can't think of any particular clever tricks, so probably a reasonably optimized C fallback works as good as it gets
<geist> you can try to do things word at a time, but i'm not sure thats legal since it might fetch off the end of a string
<mjg> well i happen to have a guarantee the buffer is aligned to 8
<mjg> so maybe some trickery can be employed for the special case
<mjg> regardless of that a non-sucky memcmp is needed
<heat> can't find it in bionic either
<mjg> ye
<mjg> just checked
<mjg> wtf
<heat> ok found it
<bslsk05> ​android.googlesource.com: libc/arch-arm/cortex-a9/bionic - platform/bionic - Git at Google
<bslsk05> ​github.com: platform_bionic/memcmp.S at c44b1d0676ded732df4b3b21c5f798eacae93228 · aosp-mirror/platform_bionic · GitHub
<mjg> w00t
<mjg> thanks a bunch man!
<heat> lol np
<heat> i have mastered the art of the github search
<heat> (seriously why doesn't googlesource.com have a search bar)
<j`ey> heat: are you blogging or posting about fsoc?
<j`ey> gsoc
<heat> no
<heat> why?
<j`ey> just wondered
<geist> oh yeah memcmp has a length so you can totally do large reads duh
<geist> i was thinking about strcmp
<geist> where you dont know the extent of the strings, so can't think of a good way to use vectors or larger words
<heat> geist: strmcmp is fairly optimisable actually
<heat> strcmp*
<geist> once you get things into registers sure, but i guess the question is how to avoid needing to load things a byte at a time to be safe
<heat> same as strlen
<heat> you align to word boundaries
<heat> then you can't accidentally touch an unmapped page
<heat> j`ey, i could but 1) I don't have a blog; 2) DXE work is fairly mundane
<geist> heat: yeah question is wehter or not that's actually correct
<geist> like, the language i suspect says differently, but in practice that's okay
<heat> i'm sure a blog post about a board port is absolutely fascinating but hearing me rant about ext2/3/4 filesystems might not be ;P
<j`ey> it's something different!
<j`ey> I kinda want a virtio-9p pkg for edk2
<heat> j`ey, what's that?
<j`ey> so you can have a shared folder between a host and a vm running uefi
<heat> looks like it's not part of the spec just yet
<j`ey> there's a virtio-blk driver, but that requires a proper disk image on the host
<heat> yeah
<heat> there's also a way to pass a whole directory as a fat32 image in qemu
<j`ey> Im not using qemu atm
<clever> heat: ive mostly seen that done by just generating a disk image from a folder
<j`ey> clever: I suppose I could just do that
<clever> virtio-9p's benefit, is that its bi-directional, and doesnt double your disk uage
<clever> its sharing a directory itself, not a disk image with a copy of the files
<j`ey> but writing a driver would be more effort :P
<clever> yeah
<clever> your basically writing a whole new filesystem from scratch
<heat> sounds like a fun project
<heat> :D
<j`ey> heat: do that after ext4 pls
<heat> k
<heat> note EmulatorPkg already has some host filesystem stuff I think
<heat> dunno if they're usable as file sharing
<j`ey> I'll take a look
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<zid> What did I miss?
<zid> Not a lot, apparently.
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<Skyz> WSL2 uses 9P to moust Linux over to Windows
<immibis> [x] doubt
<bslsk05> ​devblogs.microsoft.com: A Deep Dive Into How WSL Allows Windows to Access Linux Files | Windows Command Line
<Skyz> It mentions it briefly at the bottom
<zid> a blog post to pimp a youtube video? lovely. Also, moust?
<immibis> odd then. why 9P?
<immibis> maybe it was just what they had available
<immibis> NFS does exist
<immibis> so does proprietary microsoft stuff
<clever> immibis: 9p i think can use shared memory
<clever> it expects client and server to exist on the same cpu
<clever> so it will have better performance compared to nfs
<Skyz> I think it's a weak implementation, because 9P can do much more than allow shared files to a host system
<Skyz> I think 9p could work like ssh
<clever> Skyz: why?
<immibis> instead of managing everything through 9P, how about NETCONF/YANG?
<Skyz> The internet covers most of the use case
<immibis> YANG is a structured schema language from IETF designed for managing network nodes; NETCONF is a protocol for accessing and modifying device configuration and operational parameters, which may be modelled in YANG
<gog> NetBIOS and IPX
<immibis> plenty of XML is involved
<zid> sshfs and unix domain sockets
<heat> >plenty of xml is involved
<gog> zid: hi
<heat> ahhhhhhhhhhhhhhhhhhhhhh
<zid> gog: I take it you didn't miss me in the least
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<gog> i did, actually; i was wondering if you were ever gonna come back
<zid> could have messaged me
<zid> I did some shit to my OS this week, and by shit I mean memes basically
<gog> i suppose i could have but i get the impression you don't like me all that much :|
<zid> I spent 10 minutes adding VBE
<zid> So then I spent a little while deciding how to test said VBE
<zid> https://cdn.discordapp.com/attachments/642855427222143001/864213088591675472/unknown.png I settled on graphicam dmesg, a background image and.. a user application
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<zid> not even a chuckle? harsh crowd
<Skyz> So plan 9 is actually part of the microsoft kernel somewhere
<gog> who's the demon girl
<zid> nakiri ayame
<gog> oh
<gog> i thought it might be a tohou character
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<zid> I would move the gb emulator and/or downscale it, but I'd have to recompile it :P
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<Skyz> zid: I like it
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<kingoffrance> you got an honourable mention on february 17 2021 01:36:31 <moon-child> kingoffrance: yah, single address space os 01:36:49 <moon-child> fuck saas 01:36:52 <moon-child> all my homies hate saas 01:51:37 <geist> uh? 01:58:13 <kingoffrance> someone's gotta wear the zid hat in his absence :) 01:58:22 <geist> fair!
<zid> whatever edit I did last broke everything, nice
<zid> my qemu window is approximately 4 billion pixels wide
<gog> do you have a ligma display
<zid> No it's a supdog
<gog> oh damn that's a good display
<zid> hmm looks like an overrun and I'm spamming white pixels into the regs, which changes the mode to 0xffff * 0xffff at 0xffff bitdepth
<zid> ah yes it helps if you use the correct BAR
<heat> what's updog 😂😂😂😂😂😂😂
<heat> i hope I broke all your crappy terminals
<heat> yes
<heat> emojis win every time
<zid> I say I win, personally
<heat> 😂
<zid> Keep them in japan where they belong
<kingoffrance> U+1F98E U+1F451 just add irc color and you got tonberry king
<zid> performance of my emu inside qemu inside kvm is just shit enough that it runs at basically normal speed
<zid> without any vsync support
<gog> 🤷‍♀️
<zid> idk if that 20x slowdown is from VBE being incredibly slow or that there's some weird vsyncing going on slowing it down or what
<zid> https://cdn.discordapp.com/attachments/417023075348119556/865701313488486430/unknown.png I will say it's significantly smaller than the SDL + libc linked version
<zid> unsigned int *sdl_get_framebuffer(void) { return (unsigned int *)0x80000000; } The SDL port was a lot of work
<zid> My address space comes in two halves, the bottom 2GB, and the upper 128TB of framebuffer.
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<qookie> Hi, has anyone here messed with the PCIe controller on the RPi4?
<zid> clever might have, he is pung.
<qookie> For some reason I'm getting an SError when trying to access it's registers
<qookie> and I was wondering if anyone can help me figure it out
<clever> qookie: its got a weird ecam arrangement, where you have to select which slot your talking to first
<qookie> I'm trying to access the controller registers, not the config IO
<qookie> since I've been trying to follow the init sequence that Linux does
<clever> ahh
<clever> ive not done that yet
<clever> its on my todo list, but i have to deal with ram init also
<qookie> ah hm
<qookie> does the fw leave the controller in a good enough state for it to be usable?
<clever> ive been mostly looking at the wrong stage of the firmware to answer that
<clever> most of my work has been investigating the SPI flash half of the firmware
<qookie> I imagine it has to configure it somewhat for usb boot, but I also imagine it's configured for VC accesses not ARM accesses
<clever> start4.elf runs after that, and re-initializes everything, and may de-init it
<qookie> oh
<qookie> hmm
<clever> there are ~4 stages to the rpi booting
<clever> 1: the mask rom (no pci-e support), its default job is to just load 2 from SPI flash
<clever> 2: bootcode.bin held in SPI flash, its default job is to bring ram online, then load start4.elf from the device set by BOOT_ORDER
<clever> 3: start4.elf, initializes the entire system, and loads kernel.img from the same device it was itself loaded from
<clever> 4: your arm kernel.img
<clever> 2 will only initialize pci-e if it tries usb booting
<clever> so pci-e may be offline by the time 3 is reached
<qookie> ah so I guess I do have to do the full init in the kernel then
<clever> ive mostly been reading the binary for 1 and 2
<clever> 3 is a much larger binary, and its hard to tell what is even doing what
<qookie> yeah I can imagine
<clever> 1 is so tiny, you can analyze every single function in it, in just ~3 days
<clever> pi4 maskrom is just 14480 bytes!
<clever> bootcode.bin has a hard limit of 128kb in size
<clever> -rw-r--r-- 1 clever users 2.2M Jun 6 14:12 start4.elf
<clever> then you got this beast, lol
<qookie> still smaller than most modern firmwares on PCs lol
<heat> stripped?
<zid> thank god arm code density is terrible? :)
<clever> heat: definitely
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<clever> -rw-r--r-- 1 clever users 3.7M Sep 24 2020 start-4f63c3bdd4d9ca4f308e683fe7e70501b4ac3232-unstripped.elf
<clever> heat: this is a build where they forgot to strip, and all the symbols are present
<clever> -rw-r--r-- 1 clever users 3.6M Jun 6 14:12 start4db.elf
<clever> and thats a stripped debug build
<clever> -rw-r--r-- 1 clever users 778K Jun 6 14:12 start4cd.elf
<clever> stripped, with reduced feature set!
<heat> qookie: a full OVMF build is 4MB
<heat> not bad
<heat> for a firmware that supports almost everything you can throw at it
<clever> heat: except the un-documented hw parts of the rpi, heh
<heat> hm?
<qookie> all the big fun parts of the RPi are undocumented :(
<clever> qookie: yep
<clever> qookie: and people are constantly being misled by the v3d docs, thinking its docs for the whole soc
<qookie> huh? haven't heard of that
<clever> heat: even basic things like power domains and clock/PLL control arent documented properly
<heat> clever: yes but I was talking about OVMF
<clever> qookie: this pdf is just for the 3d peripheral within the soc
<clever> at least 3 or 4 people have assumed it documents the entire soc
<qookie> ah lol
<qookie> ah yes my soc only knows how to do graphics
<clever> there are dozens of components within the soc
<clever> 2d composition, 3d rendering, hdmi, composite, dsi, csi, isp, h264, jpeg, pwm, vpu, arm, ram controller, dma controller, smi, uart, spi, i2c
<clever> just to name a few
<heat> why are jpeg and h264 components
<qookie> accelerated encoding/decoding
<clever> heat: hw accelerated h264 encode/decode and jpeg encode/decode
<heat> why is that not part of the GPU
<zid> soc baby
<clever> because its faster and more power efficient to do it with dedicated logic
<clever> and this design was originally a mobile design
<heat> yes but that's usually part of the GPU
<heat> that's where video acceleration usually is
<clever> and the "GPU" is just a collection of components, each doing a different task
<heat> (except in lower end nvidia mobile GPUs where they just went fuck it and stripped it out because of the iGPU or something)
<clever> 2d rendering, 3d rendering, and video decode, are 3 entirely different peripherals
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<clever> they are also in seperate power domains, so you can turn parts off
<heat> not like any of it matters since you need to hold a gun to linux's head to get hw video acceleration!
<clever> the h264 part will never be getting proper documentation
<clever> so the only way to control it, is via IPC to the start(4).elf blob
<heat> what? I can't hear you over the sound of my fans ramping up because I decided to watch a 1080p60fps video
<zid> buy nbindia and it just works ;)
<qookie> heat: this but unironically
<heat> zid: what's nbindia
<heat> is it good?
<zid> linus hates them, but it does just work tm
<heat> it works except in like half the web browsers since they adopted a different API
<clever> heat: the rpi has been moving towards using v4l based encoder/decoder accel
<clever> so that problem stops comign up, every time a new api is invented
<heat> web browsers are already having issues supporting *one API* so WHY NOT TWO OR THREE
<heat> issues like these make me think that no one actually uses linux
<clever> [clever@amd-nixos:~/apps/rpi/rpi-open-firmware]$ uptime 19:31:36 up 32 days 4:53, 1 user, load average: 5.64, 5.67, 5.79
<clever> heat: that is my primary desktop
<heat> people just pretend to so they seem smart and hacker-like
<qookie> instead of adding useless hw decoders just make the cpu faster so it can decode without any issues :^)
<zid> My primary VM doesn't have a way to set its own desktop resolution without using xrandr
<clever> qookie: battery life
<zid> linux is desktop ready
<heat> qookie, only useless in linux baby!
<qookie> hell yeah
<heat> my whole desktop lags when I'm watching a screen share in linux/zoom
<heat> erm, discord/zoom
<zid> are you on nbindia?
<heat> i'm on intel because jensen took out my nvenc chip
<zid> found your problem then tbh
<zid> desktop linux only works when nvidia rewrites half of X for you
<heat> oh and nvidia finally added optimus support to X11 just that it's slower and you _have to use X11_
<qookie> heat: my laptop's cpu is not that weak (yet) but I do start dropping frames when compiling etc
<heat> qookie, what's the CPU?
<zid> eww optimus
<qookie> i5-3210M
<heat> huh?
<heat> my CPU is 5 generations newer than yours lol
<qookie> laptop's permanently plugged into the wall, battery died a while ago
<heat> are you sure you're not lagging
<clever> model name : AMD FX(tm)-8350 Eight-Core Processor
<qookie> not in a noticable way at least
<zid> Mine's same gen ish but has 6x the passmark score
<zid> by virtue of not being mobile, and probably has 8x the ram
<qookie> idk, maybe I'm used to the lag after all this time :^)
<heat> clever, wow that's vintage AMD
<heat> "dad, were CPUs this slow in 2012?"
<heat> "no son that was just AMD"
<clever> lol
<zid> For just 100W more you can get almost double the single core perf, twice as many cores, quad channel, and ecc ;)
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<zid> 130W laptop cpu, it also fries eggs
<clever> that reminds me
<clever> a few years ago, i had trouble with the 8350 going into thermal shutdown
<heat> i'm just waiting for the google money so I can get a 5950x
<clever> so i fired up the (windows only) motherboard utils, to monitor the temp/amps over a wonky usb cable, from a 2nd machine
<clever> i then discovered something rather alarming
<zid> I'd rather have a 5800
<clever> when windows maxes out the cpu, it draws over 10 amps
<clever> and i say "over", because i cant tell you the exact number
<zid> 10 amps? pfffft
<clever> it literally GOES OFF THE GRAPH
<zid> Mine goes near 100
<clever> the scale doesnt go that high :P
<zid> 1V cpu, 130W, math
<clever> yeah, the math said its normal
<zid> granted it probably has like 400 power pins
<clever> the weird part
<clever> is that linux draws something like 40% the power
<zid> so it's more like 250mA
<clever> i cant get linux to draw anything close to the same amperage
<zid> linux isn't trying hard enough then
<clever> even when i run prime95 on linux
<heat> linux is way nicer to the CPU than windows
<heat> i'm on 700mhz on all cores right now lol
<zid> I'm watching youtube so I'm on.. 4.4GHz all core, whoops
<clever> heat: cpufreq doesnt even work on this core! lol
<clever> i'm locked to 4ghz
<zid> My turbo is locked to x44 sadly
<zid> Even though the MSRs say 57 is the max
<zid> I'd love some weird software unlock bug
<zid> this thing is stable at its max multi, which is a near 50% overclock, undervolted
<zid> I bet it'd >5GHz
<clever> zid: my mobo has a wonky ipmi like thing
<heat> 32nm was ages ago
<zid> yea intel haven't made any decent since
<zid> 2011
<clever> if you flip a toggle switch beside a special usb port
<clever> and then use a weird usb cable, that connects 2 hosts together
<clever> the mobo will identify itself as a USB HID device
<clever> with the right windows-only software, you can then monitor voltage, temp, amps, freqs, and more
<heat> like 10 "oh we can't go for a smaller process node" intel cycles
<zid> there's a little ipmi thing you can buy that does hw logging and lets you play with everything, I forget the name
<clever> and you can dynamically change the freqs, without the os on the mobo having to co-operate
<zid> heat: we're on 32nm++++++++++++++ now
<zid> A die shrink of my cpu would absolutely murder anything intel actually sell
<clever> zid: i suspect the protocol can also read/write the ram, because there is mention of installing a companion app on the target to get more control
<clever> but the whole thing is horribly documented
<clever> the official website, has html errors in its page
<clever> as-in, half written html tags, that are visible in the final render
<qookie> intel had some thing where you could debug a cpu of one computer on another with some special sauce usb cable
<clever> it looks sketch as hell :P
<heat> you know
<heat> if there's anything I don't miss from 2013 it's companion apps
<zid> like, I'm not even joking
<heat> thank god that died out
<sauce> usb??
<clever> heat: this is even more crazy, its a companion app, that you run on a SECOND machine
<zid> Intel's *current* top end workstation xeons are 14nm++++ which gets you.. 5GHz, 2 channel memory, 16 pci-e lanes
<clever> the os on the mobo, doesnt have to be compatible, or even co-operate with the app
<qookie> sauce: oops didn't mean to mention you, sorry
<zid> I get 4.4 (locked not theoretical max), 4 channels, 40 lanes
<sauce> no problem but thats weird
<bslsk05> ​software.intel.com: USB Native Debug Class (DbC) Cable
<heat> zid, you sure they only have dual channel?
<zid> max memory bw on comet lake: 45GB/s, sandy bridge: 68GB/s, and that's before overclocks on the sandy which again, i'll happily do
<zid> yes
<heat> that's weird
<zid> amd do n channel but it's just dual channel and multiple dies
<heat> doesn't like everything have dual channel?
<zid> intel's sandbagging as hard as they possibly can while trying to *seem* decent
<zid> until 10nm finally works
<zid> they've pushed it back like 6 years now
<heat> zid, 10nm has been here for like 2 years
<zid> no they had "basically 10nm, for some mobile chips"
<zid> first gen to use 10nm will be tiger lake, the shrink of comet
<qookie> is intel still doing tick-tock?
<qookie> I thought they stopped some time ago
<heat> yeah
<zid> they've missed it for a bunch of years and stopped
<heat> they stopped? huh
<zid> They just name everything *lake now
<zid> and make random numbers up
<heat> nvidia but with lakes
<zid> ice lake exists in 10nm, but there's nothing above a few watts, so presumably.. they still can't get it to work right
<zid> and has exciting names like 1068NG7
<heat> that should be OEM only no?
<heat> sounds like it at least
<zid> yea it's low power mobile stuff
<zid> can't put 100W through a junction if your layers don't line up
<bslsk05> ​'Mixing Nitrous and Rockets is DANGEROUS... But Really FUN!' by Tech Ingredients (00:39:11)
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<zid> mixing pens and pocket protectors is more our style isn't it
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