klange changed the topic of #osdev to: Operating System Development || Don't ask to ask---just ask! || For 3+ LoC, use a pastebin (for example https://gist.github.com/) || Stats + Old logs: http://osdev-logs.qzx.com New Logs: https://libera.irclog.whitequark.org/osdev || Visit https://wiki.osdev.org and https://forum.osdev.org || Books: https://wiki.osdev.org/Books
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<heat> good evening osdevers
<heat> long time no see
<meisaka> long time?
<heat> relatively long time no see
<heat> :P
<geist> lo heat
<geist> i see you visited the PNW last weekend
<heat> lol
<kazinsal> god I hope we don't get another one of those
<kazinsal> pretty sure I'm just going to move my mattress into my living room where it's cooler if we get another nasty heat wave
<clever> "2021-07-02 23:11:12 bedroom temp: 22.62c(72.72f), kitchen: 24.38c(75.88f), living room: 23.31c(73.96f), outdoor: 12.00c(53.60f), server: 25.25c(77.45f) VCC: over 4.5 volts portb: 00000000"
<clever> starting to cool off here, after that last wave
<geist> yah it's nice outside here now
<kazinsal> same here
<kazinsal> the firestorm weather in the interior is pretty wicked though
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<doug16k> no air conditioner?
<clever> doug16k: correct
<clever> in canada, you only need one for maybe one week every year
<doug16k> it's worse here
<doug16k> more like, you are soaked with sweat all day every day one week of the year, rest is just stuffy awful, or beautiful
<doug16k> it's not that hot this year though
<doug16k> places where it usually isn't bad are getting it
<doug16k> honestly though I run straight to the air conditioned office after I go outside :P
<doug16k> humidity is pretty uncomfortable
<air> it is awesome here, a nice ~105F everyday, but still have a jacket when going to the store which runs their AC too low
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<bermuda911> Yes, as the logs show , all of you are knowing where things go to, especially Klange and Geist and Clever such enthusiasts wasting the worlds time, after all the logs and how you were thrown out from freenode show what intelligence we are talking about here, dudes belive it is ridiculous . geist never passed a single turing test on the channel and only parroted how to sanction me and how mentally ill i am, total mistakes dude, and yeah you know
<bermuda911> everything including all where my talks are heading too indeed, based of your intelligence you can sort of anticipate literally "everywhere" how things work, and the truth is something you can aniticipate when getting a lot of anal from others, that this guy is dangerously talking about truth where we OSDEV "heros" lack any senses what is even right or wrong, you are a waste of time in the world, and probably get removed from libera.chat too.
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<klange> Now independently extracting glyph shapes, but need to handle curves properly - the shapes I was stealing from stb were preprocessed to simplify curves. https://klange.dev/s/Screenshot%20from%202021-07-03%2018-58-54.png
<klange> I could just... see how they're doing it, but that feels like cheating.
<klange> I am also reading instruction listings and it's a very interesting little bytecode machine; primarily stack-based, but there is a "graphics state" which is essential dedicated registers for things like unit vectors and points.
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<sortie> klange is definitely building the matrix
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<sortie> That's a lot of sweet icons
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<bslsk05> ​typesetinthefuture.com: Alien | Typeset In The Future
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<sortie> Oh no klange is affiliated with the people at Yutani
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<klange> okay got curves implemented on my own, need to do compound glyphs and finish the extraneous metrics bits and it should be ready for at least an initial switchover, then I can invest some time in the instruction interpreter
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<jjuran> sortie: At least it's not Wayland :-P
<klange> That is the joke, though.
<klange> Wayland -> Weyland -> Weyland-Yutani -> Yutani
<jjuran> ah, ok
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<Skyz> My original intent with computer science was to make a bot for a game
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<Skyz> With algorithms do you search for the most efficient one for a given problem?
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<alexander> I'm trying to figure out how to identity map the first 4MiB of memory. I tried to have two entries (2MiB each) but they appear to be only 4KiB eventhough I set the PS bit and PAE is enabled. Did I miss something obvious? (https://gist.github.com/superaxander/a9cbd35a9833009ee5c14e5611322d85)
<bslsk05> ​gist.github.com: boot.asm · GitHub
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<ZetItUp> change or eax, 1 << 8, to or eax, 1 << 3
<ZetItUp> or b00000100 if you prefer that
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<alexander> But the LME bit is bit 8 right? Anyway changing 1 << 8 to either 0b100 or 1 << 3 did not work. Bochs tells me that I tried to set reserved bits in the EFER MSR.
<doug16k> where does it fault? the ljmp?
<doug16k> ah reserved bits
<alexander> Yeah but that only happened after applying ZetItUp's suggestion
<doug16k> can you make a new paste?
<doug16k> is bochs built to support x86_64?
<doug16k> the one in your package manager probably has a goofy configuration
<doug16k> you should build it from source
<ZetItUp> no idea btw if amd and intel's GDT are the same?
<doug16k> ZetItUp, amd invented long mode
<alexander> Is there an easy way to check? There is a cpuid check before this so that at least reports long mode support
<doug16k> yeah, intel made theirs match amd's when they copied it
<ZetItUp> doug16k ah ok :D
<doug16k> the only significant difference is, (at least some) intel will decode a far jump in long mode, AMD won't because it says plain as day in the amd64 spec that you can't far jump in long mode
<doug16k> absolute I mean
<ZetItUp> oh :o
<alexander> Before I changed the page table from one that simply had 512 4KiB entries it got past the long jump but I wanted to access additional memory after that which didn't work because it wasn't mapped
<doug16k> portable way is push seg, push off, lret, or store it and jmp *something
<doug16k> I had the simplest long mode page table init code ever a while ago in my rom project
<doug16k> it used 1GB pages though
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<ZetItUp> alexander you are in pmode before trying to enable long mode i hope? :D
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<bslsk05> ​github.com: qemu-rom/entry_arch.S at master · doug65536/qemu-rom · GitHub
<alexander> I'm pretty sure I am, grub puts me in protected mode right?
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<doug16k> ah wait, no it does some non-identity stuff too
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<doug16k> alexander, ignoring my comment about bochs configuration?
<alexander> I asked how I should check that
<doug16k> does r show 16 general registers?
<alexander> yes
<doug16k> ok good
<ZetItUp> doug16k when would you use 1gb pages? servers?
<doug16k> the wrmsr faults?
<doug16k> ZetItUp, whenever you want to map 1GB aligned physical range to 1GB aligned virtual range, ideally
<alexander> well only if I apply the change ZetItUp suggested but that one didn't make sense to me anyway
<doug16k> ZetItUp, of size 1GB or more
<alexander> You're also setting bit 8 in your code so I'm pretty sure that line was fine
<ZetItUp> doug16k ah makes sense
<doug16k> did you turn on PAE in EFER?
<doug16k> PAE must be on
<doug16k> er, CR4
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<alexander> That's in the snippet
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<alexander> Line 34-38
<doug16k> you are using large pages and PSE is not set?
<alexander> I read that you didn't have to set PSE if PAE was enabled
<ZetItUp> this is my long mode jump, pretty short: https://pastebin.com/gxBBy6NY
<bslsk05> ​pastebin.com: long_mode_enable: lgdt [gdt64.desc] ; Set PAE and PGE - Pastebin.com
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<ZetItUp> everything else is being set before that ofc :P
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<doug16k> did you say exactly which instruction faults?
<doug16k> or we just assume
<alexander> it fails after line 49 because the kernel is no longer mapped
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<alexander> I can see it loaded with 4KiB pages instead of 2MiB because info tab shows this
<alexander> cr3: 0x000000001000
<alexander> 0x00000000-0x00000fff -> 0x000000000000-0x000000000fff
<alexander> 0x00001000-0x00001fff -> 0x000000200000-0x000000200fff
<doug16k> can't help you. someone else says PSE isn't needed. ask them
<alexander> I have tried setting PSE bit too
<alexander> that didn't change anything
<doug16k> your page tables are aligned?
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<alexander> Hold on I just saw that I might've set the wrong bit
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<alexander> Okay that did not fix it but bochs does show that both PAE and PSE are set now.
<doug16k> ah ya that is right
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<alexander> Yeah everything is at a multiple of 0x1000
<doug16k> found it in intel manual: (PAE paging and IA-32e paging can use multiple page sizes regardless of the value of CR4.PSE.
<doug16k> what does this say: xp /1gx $cr3&-4096
<doug16k> or 2wx if you don't have my bochs fork :P
<alexander> syntax error at '$cr3' 😬
<doug16k> oops drop $
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<doug16k> $ is gdb syntax. no $ in bochs syntax
<alexander> Yeah same syntax error but without the $
<doug16k> you could also creg
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<doug16k> then manually put the cr3 value
<alexander> yeah I did that copying is taking a while
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<bslsk05> ​gist.github.com: gist:b6236608e34f3ba6aacdf63317cbb8fc · GitHub
<doug16k> and at 0x2000 ?
<alexander> 0x2000 is already there at line 257 though right?
<doug16k> oh I just figured that out
<ZetItUp> what size are your pages set to?
<doug16k> it is 4K pages
<alexander> That's the original premise of my question I wanted 2MiB pages but they're 4KiB :/
<doug16k> PML4 can't have PS set, it would be 512GB page. PDPT can have it set, it would be 1GB page. PD can have it set, it would be 2MB page
<doug16k> cpuid tells you whether the machine supports 1GB and 2MB pages
<doug16k> two capabilities
<doug16k> there are machines and vm hosts that don't support 1GB
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<doug16k> you need to set a bit in the PD entry to make it a 2MB page, the PS bit (page size)
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<alexander> Yeah I thought I did that
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<alexander> oh did I do it on the wrong level
<bslsk05> ​gist.github.com: gist:b6236608e34f3ba6aacdf63317cbb8fc · GitHub
<doug16k> yeah
<alexander> Ah that makes a ton of sense
<doug16k> the next layer of page table tree doesn't even exist
<doug16k> there are no 4KB page tables for that run of 512
<doug16k> if you turn on PS on like 513 I mean
<doug16k> line 513
<alexander> oh so then I need multiple entries on that layer?
<doug16k> that one entry maps 2MB
<doug16k> 0 thru 0x1fffff
<doug16k> if you put another large page after that, then you advance the physaddr 2MB too
<alexander> Nice it worked
<doug16k> you don't add 4K
<doug16k> nice
<doug16k> qemu doesn't limit check line 53 btw. only bochs or kvm will catch a limit violation
<doug16k> QEMUs emulation won't trap invalid efer setting or invalid cr0 either
<doug16k> long mode code working in qemu means nothing
<alexander> Good thing I'm using Bochs in that case :P
<doug16k> yes
<alexander> Man I'm glad I'm making progress because this project is from 2018 but I got stuck back then, I'm glad I'm getting further now :)
<doug16k> bochs strictly enforces everything
<doug16k> it's so real, it forces the uart to be slow and makes it overrun if your code would overrun
<doug16k> comments are wrong a lot
<doug16k> use constants, not hardcoded crap with comments that are wrong
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<doug16k> 1 << 4 is hideous
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<doug16k> avoid that
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<doug16k> you typed enough to write the constant for PSE three times over
<doug16k> ...in comments
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<alexander> Oh yeah I don't even remember if I wrote those comments myself
<doug16k> you don't need PSE in long mode
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<doug16k> TIL
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<doug16k> PAE implies PSE
<alexander> Yeah I don't remember where I originally read that but it was somewhere on the wiki
<doug16k> use the real manual
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<doug16k> I couldn't care less what the wiki says
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<alexander> Oh yeah I know the wiki is just convenient sometimes
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<doug16k> when it isn't a gauntlet to sign into the wiki, I might contribute again
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<alexander> What do you mean?
<doug16k> bunch of song and dance you have to do with the forum login or something. I can't be bothered
<doug16k> I don't want to make an edit that badly
<doug16k> it's an utterly inept login form
<alexander> Oh I did that in 2015 so I don't even remember
<doug16k> feels like a perl script in 1999
<doug16k> what is it doing?
<doug16k> it should have an account recovery that works like people expect
<doug16k> send me a password reset, like a normal website
<doug16k> some bb thing I have to go to or something? wut?
<alexander> Yeah I dunno
<doug16k> so inconvenient I can't be bothered
<doug16k> I think the joke is, if you can't figure out the login, then we don't want the edit
<doug16k> unfortunately that also means that people that know what they are doing get deflected away
<doug16k> just the because of inconvenience
<kazinsal> the wiki just reads the forum database for your account info iirc
<kazinsal> but the forum software hasn't been upgraded since like 2007 so it's positively archaic
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<mathway> Hi, guys. I am reading Tanenbaum's book "Structured Computer Organization" and now on the chapter dedicated to Operating systems. There's a question at the end of this chapter which sound like this and i can't solve it: Not all computers have a hardware bit that is automatically set when a page is written
<mathway> to. Nevertheless, it is useful to keep track of which pages have been modified, to avoid
<mathway> having to assume worst case and write all pages back to the disk after use. Assuming
<mathway> that each page has hardware bits to separately enable access for reading, writing, and
<mathway> execution, how can the operating system keep track of which pages are clean and
<mathway> which are dirty?
<j`ey> mathway: mark a page read only, if its written to, you page fault and can set the dirty bit
<mathway> What means "operating system can keep track of which pages are clean and which are dirty?"
<mathway> Hmm
<j`ey> dirty = page that has been written to
<j`ey> clean = not yet written to
<mathway> Wow, it's an interesting solution. The dirty bit is stored somewhere in kernel's memory i guess?
<j`ey> page tables usually
<immibis> wherever the kernel wants to store it. It could be an unused bit in the page table, if you want to track it per virtual page instead of physical page
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<mathway> Thanks a lot!
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<mathway> Also, i have read an article about paging on wiki.osdev.org, which describes it in x86, and it mentions an access bit inside pd/pt. Can you tell me why it is useful? If it is set, it is still indeterministic if page have been written to or not, so os can't rely on it as a dirty bit. So, why intel developers decided to mark not as dirty bit, but access bit?
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<immibis> mathway: maybe you want to swap out infrequently used pages. If the access bit is set, the page isn't infrequently used.
<immibis> assuming that you clear it every so often
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<immibis> both read access and write access are useful things to know
<immibis> it's just one factor in the decision though - it's not a panacea. swapping out a clean file-backed page is cheaper than swapping out a dirty file-backed page, but swapping out a clean anonymous page is the same cost as a dirty anonymous page, unless the page was previously swapped out and still exists in the swapfile...
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<immibis> accessing a page that's been swapped out is expensive so if it's been accessed in the recent past you might guess it's going to be accessed in the near future, and therefore expensive to swap out
<immibis> deduplicating a page is free but only if neither page gets written to... etc etc
<immibis> there is no perfect memory management policy... except, maybe, leaving it to apps to indicate how their memory should be managed, so you can blame the app instead of the kernel when it's wrong :)
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<immibis> irrelevant trivia: the term "disk operating system" didn't come from a disk variant of something called an "operating system". It came from a system which operates disks.
<immibis> i.e. a disk-operating system
<mathway> That's so interesting... i need a little bit of time to understand
<mathway> I need to clarify 2 terms. 1) Swapping out means to prepare a physical page to be reused by another application?; 2) anonymous page is page which has got no backed file i guess?
<mathway> I thought before that os store all of the information needed for page-replacement policy inside some of its memory, not inside pd/pt structure
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<bslsk05> ​twitter: <kylpeacock> Congrats @davidcelis , you get a shout out if #GitHubCopilot tries to generate an "About me page" https://pbs.twimg.com/media/E5P8rXTUYAIMIds.jpg
<bslsk05> ​[ <div class="about-me"> ␤ <h2>About me</h2> ␤ <p> ␤ I am a software engineer from the Bay Area, currently working at <a href="http://www.salesforce.com">Salesforce</a>. ␤ </p> ␤ <p> ␤ I love to learn new things and build things. ␤ </p> ␤ <p> ␤ I have a <a href="https://github.com/davidcelis">Github</a> account. ␤ </p> ␤ <p> ␤
<kazinsal> AI-powered code generation: still an incredibly bad idea
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