klange changed the topic of #osdev to: Operating System Development || Don't ask to ask---just ask! || For 3+ LoC, use a pastebin (for example https://gist.github.com/) || Stats + Old logs: http://osdev-logs.qzx.com New Logs: https://libera.irclog.whitequark.org/osdev || Visit https://wiki.osdev.org and https://forum.osdev.org || Books: https://wiki.osdev.org/Books
<doug16k> I made the header part of the ROM
<doug16k> I just extract the bin and it has a header already
<doug16k> I started out doing it in a script and I realized I can just impersonate the header in the first 64 bytes
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<gorgonical> I don't know where u-boot is loading this thing to when I do bootm loados
<gorgonical> 0x20000 is empty afterwards, but 0x80000 is, too
<gorgonical> 0x200000*
<gorgonical> And worse, there's stuff at 0x80000 before we bootm loados
<gorgonical> I'm very confused right now
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<jinn> lol
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<gorgonical> Any particular reason why qemu seems to zero out the memory when I do bootm loados?
<geist> hmm bootm where?
<gorgonical> in u-boot interactive shell
<geist> how does it seem to zero out memory?
<gorgonical> After starting I can md 0x200000 (where the kernel is at) and I see the code plus the 64-byte uImage header
<gorgonical> then, bootm start 0x200000, then bootm loados
<geist> ah so where does the uimage header say to load it?
<gorgonical> md 0x200000 is now empty, and the load address of 0x100000 is also empty
<gorgonical> To be clear, 0x100000 is empty at startup, too, so nothing there is being overwritten (afaik). However, the contents of the kernel at 0x200000 vanish, and nothing at 0x100000 changes
<geist> where does the uimag eheader say to load it?
<geist> the uimage header has a whole structure to it
<gorgonical> Load Address: 00100000
<geist> hmm
<geist> try putting something at 0x10000 first and then seeing if it overwrites it with zeros
<geist> or if it's simply loading it somewhere else (or not at all)
<gorgonical> To be clear, the way I constructed this rom is this way: https://pastebin.com/Xj7aRJVd
<bslsk05> ​pastebin.com: #!/bin/shMASTER=kitten.binSIZE_MB=6KERNEL_OFFSET_MB=2DTB_OFFSET_MB=5 - Pastebin.com
<gorgonical> so u-boot.bin is what you expect, then uImage is generated with mkimage and vmlwk.bin
<geist> sure
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<geist> so first thing i'd see is if it failed to load something to 0x1000000 or if it loaded zeros to it
<geist> but my guess is the former
<gorgonical> mw 0x100000 0xa doesn't actually write anything there
<gorgonical> wat
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<geist> another thing would be to maybe load an internally corrupt thing and see if it does the same thing
<geist> yah, that was my suspicion
<gorgonical> am I doing something really dumb like operating u-boot from the ROM and I'm trying to shove everything into the ROM or somethign??
<gorgonical> says flash start is 0x0 so that should be writable
<gorgonical> wait, does u-boot mean ROM when it says flash?
<gorgonical> DRAM bank start is 0x0000000040000000, so is *that* the first writable byte of memory?
<gorgonical> Okay so that's what that problem is...
<gorgonical> Okay then so if the first writable byte of memory is 0xdeadbeef, then the kernel's load address/start point should probably be there, also, right?
<gorgonical> or at least past that
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<geist2> ah yes. what machine are you emulating?
<gorgonical> the goal is to run all this on a pine64, but right now I'm using -m virt for the qemu arg
<gorgonical> -machine virt * that is
<gorgonical> -m is for memory ofc
<gorgonical> setting the uImage load addr/start point to the kernel_addr_t which is like 404000000 or something gets me to a started kernel. However, el2_setup is trying to load from x14, #20, but that points to 9000020, which is all zeroes...
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<gorgonical> I'm starting to understand... So currently it's loading the uart physical addr to x14 and trying to ldrb from it. That's hanging forever
<gorgonical> Probably because the #define for the uart physical addr is wrong?
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<geist> on the virt machine dram starts at 0x4000.0000 yes, so you'l want to load there and up
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<hgoel[m]> I have a 'pleasant' problem now, working on ethernet drivers, all but one of my computers have some version of rtl8168 in them, which turns out to basically be an 8169, but while the driver works perfectly fine on one machine, receiving packets for a few hours now, on another machine it 'receives' the packets, but doesn't seem to be writing them to the specified location...
<hgoel[m]> can't even pop into an emulator to check, receive interrupts are being fired and received so it's just weird
<hgoel[m]> looking through the freebsd and linux drivers it doesn't look like there's anything different about that specific revision of the chip
<meisaka> PCI bus mastering on? read cache on the buffer memory disabled?
<Mutabah> Dod you enable PCI bus mastering?
<hgoel[m]> yep
<hgoel[m]> and yes, uncached mapping on all mmio/dma stuff
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<atilla> Sold my macbook m1 to preorder the sifive board, excited
<Affliction> those look like nice boards
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<riverdc> I just drew some characters to a monitor for the first time
<riverdc> haven't been this happy to see something on screen for a while
<riverdc> strangely the monitor fades to black a few seconds after boot though, any ideas why that might be?
<riverdc> redrawing to the framebuffer doesn't seem to help
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<Affliction> EFI? watchdog timer might be expiring
<Mutabah> Have you exited boot services?
<riverdc> Mutabah: what are boot services?
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<Mutabah> How are you booting and getting a framebuffer?
<moon-child> efi distinguishes 'boot services' and 'runtime services'. 'Boot services' are those you should only use in a bootloader; 'runtime services' are those you can use in your kernel, at runtime (though you shouldn't)
<riverdc> ah i see, thanks. yeah that might be it
<uplime> congrats on getting something to draw though :)
<riverdc> i'm testing on a raspberry pi 4, which has proprietary firmware / bootloader
<Mutabah> Ah. might be that there's a heartbeat you need to send to the videocore
<Affliction> I've yet to do anything with the pi, I promise I'll start learning ARMv8 any decade now!
<riverdc> honestly it's not as well documented as I was expecting, can't say I particularly recommend it
<riverdc> especially this videocore related stuff
<moon-child> iirc clever was doing something with videocore, maybe?
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<bslsk05> ​github.com: qemu-rom/polygon.cc at master · doug65536/qemu-rom · GitHub
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<doug16k> I made so many software renderers over the years when I was starting out
<clever> doug16k: https://github.com/cleverca22/3D/blob/master/3D.BAS did i ever show you this one?
<bslsk05> ​github.com: 3D/3D.BAS at master · cleverca22/3D · GitHub
<doug16k> curious how well the page flipping works with dispi framebuffer. you can actually double/triple buffer
<doug16k> triple would make sense if there were a vsync
<clever> riverdc: i know more about the rpi's 2d subsystem
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<doug16k> clever, nice
<clever> doug16k: it was limited to wireframe and solid color, no texture support, and it took ~5 seconds to render a frame (50mhz laptop)
<doug16k> I just noticed that kvm+gdbstub screws up severely if you single step the 1st instruction of the ROM
<doug16k> at power up
<doug16k> rip is suddenly 1
<doug16k> impossible
<atilla> damn that qemu rom supports riscv too
<klange> reminded that a vector rasterizer is on my list of things I really need to do...
<doug16k> atilla, supports is a stretch
<doug16k> atilla, lots of the cpus are not finished
<doug16k> but yeah a fair bit is done for riscv
<atilla> keep saying my name
<doug16k> weird, idk why I did that
<atilla> its ok i like t
<klange> ♬ If no one is around you, say baby I love you, if you ain't runnin' game ♬
<atilla> whos following fuchsia
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<riverdc> clever: do you have any about the display cutting out issue I mentioned? setting the appropriate hdmi_group and hdmi_mode in the firmware config.txt fixes it but I'm not sure why
<klange> > 'runtime services' are those you can use in your kernel, at runtime (though you shouldn't)
<clever> riverdc: the only time i had things cutting out, was when i had too many sprites on-screen at once
<doug16k> riverdc, do you loop the hell out of the cpu, or do you wait for irq?
<klange> Aren't there only like two standardized runtime services any way, and one of them is for accessing EFI vars?
<doug16k> I am guessing it could be thermal shutdown
<riverdc> I loop the hell out of the 3 cores I'm not using, haven't done interrupts properly yet
<clever> doug16k: the firmware will go into thermal throttling and just lower the clock speed
<riverdc> and loop the hell out of the 4th when I'm waiting for input
<clever> riverdc: what are the full contents of config.txt?
<doug16k> clever, last I heard, rpi4 overheat
<doug16k> is that not so?
<clever> doug16k: only under high load, and only if you seal off air flow
<clever> if its open to the air, it can cool itself
<clever> and it wont shut off, just throttle the cpu
<doug16k> riverdc, can't you just daif_set #f and wfi on the APs?
<doug16k> why is it everyone infinite loops arm processors?
<riverdc> I tried that but with wfe instead of wfi, for some reason wfe wasn't blocking
<riverdc> and I just haven't gotten around to figuring out why yet
<riverdc> I only read from the serial connection successfully from real hardware for the first time a few hours ago
<riverdc> clever: https://paste.ee/p/aQxJj
<bslsk05> ​paste.ee: Paste.ee - View paste aQxJj
<doug16k> it's like jamming the brakes on and stepping hard on the gas at a red light, saying, "it's fine, this engine is good on gas!"
<clever> riverdc: fkms might be the problem, try commenting out line 61
<riverdc> doug16k: i know i know, i'll fix it soon!
<clever> fkms has a different protocl that isnt documented yet
<doug16k> :D
<riverdc> clever: that indeed fixed it, thank you!
<clever> riverdc: there are 3 different protocols floating around right now
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<clever> there is the legacy mailbox framebuffer protocol, where the firmware manages everything, and just gives you the addr for a framebuffer
<clever> there is the fkms protocol, where linux DRM is somehow mapped to firmware dispmanx over an undocumented protocol
<clever> and there is the kms driver, where the arm core takes full control of the 2d subsystem
<clever> when in either mailbox framebuffer or fkms, the firmware can render its own things ontop of the screen, so you can still see the overheading and undervoltage warnings
<riverdc> interesting, that's very helpful, thanks. i'll try to take a look at the kms driver. I had just assumed that hardware acceleration even for 2D wouldn't be worth the effort, but this sounds promising
<clever> riverdc: i have documented the kms stuff in much more depth, and created a custom 4th protocol
<clever> riverdc: https://www.youtube.com/watch?v=JFmCin3EJIs this is a demo of my own custom 4th protocol
<bslsk05> ​'Chaos, 13 sprites randomly bouncing around' by michael bishop (00:00:12)
<doug16k> riverdc, I looked at it, it is surprisingly easy to use, considering
<clever> that is using almost zero cpu time
<doug16k> the videocore thing I mean
<doug16k> on the difficulty scale where gpus belong I mean
<bslsk05> ​github.com: lk-overlay/hvs.c at master · librerpi/lk-overlay · GitHub
<clever> riverdc: for each sprite you want to display at 1:1 scale, you need to add a 7 x 32bit structure to a list, and then terminate the list with a single 32bit magic (line 155)
<bslsk05> ​github.com: lk-overlay/dance.c at master · librerpi/lk-overlay · GitHub
<clever> riverdc: then you just shove the index for the start of that structure, into a special register, and boom, its rendering
<clever> update that reg on vsync, and now you have tear-free flipping
<clever> my custom 4th protocol, is to let the mailbox framebuffer protocol initialize all of the hardware (the hdmi init isnt so simple)
<clever> then hijack things afterwards
<clever> behind the scenes, the mailbox framebuffer, is just giving you the address for one sprite, and then your changing the memory backing that sprite
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<riverdc> this is great, thanks so much. saving me lots of time
<clever> pi4 handles things in a slightly different way from past models
<bslsk05> ​github.com: linux/vc4_hvs.c at rpi-5.10.y · raspberrypi/linux · GitHub
<riverdc> how are you programming the videocore to perform its side of the protocol? i thought it was terribly documented and basically not understood
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<bslsk05> ​github.com: rpi-open-firmware/video-pipeline.md at master · librerpi/rpi-open-firmware · GitHub
<bslsk05> ​blog.benjdoherty.com: Exploring Hardware Compositing With the Raspberry Pi
<clever> riverdc: those 3 links explain the 2d subsystem in more depth
<bslsk05> ​github.com: VideoCore IV Programmers Manual · hermanhermitage/videocoreiv Wiki · GitHub
<clever> riverdc: this wiki is where i got nearly everything i know about programming the VPU side of things
<clever> riverdc: the rest is either decompiling stuff, or finding linux source for a hw component, and writing drivers for each thing
<kingoffrance> aint been touched in 8 years, but that links to ack toolchain getting video core 4 support :)
<kingoffrance> i was wondering if that was well known or not, since noone ever talks about ack :)
<clever> kingoffrance: i added support for cross-compiling with that toolchain to the nix package manager
<clever> ack?
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<kingoffrance> linked off of /hermanhermitage/videocoreiv
<clever> ah, i hadnt seen that link yet
<kingoffrance> vasm and vcc too, i dont follow these things ,that was promising for atari jaguar :)
<clever> the toolchain i added to nix, was the gcc based one
<bslsk05> ​itszor/vc4-toolchain - A port of the GNU toolchain to the Raspberry Pi's VideoCore4 processor. (13 forks/91 stargazers)
<kingoffrance> looks like it was getting broad support anyhow
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<klange> Hm, my vmware svga driver works fine in... well, vmware, but it's failing to modeset in virtualbox...
<klange> It gets the framebuffer address from the port i/o interface presented in BAR0, not directly from BAR1, so it at least seems to be responding correctly when I ask for that, but it's just... not doing anything when I update the resolution?
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<klange> QEMU modesets with it, but then seems to not update the UI automatically, suggesting it wants a sync signal somewhere or is bugged.
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<klange> Okay, so it seems both qemu and virtualbox "updated" their vmware svga backends in ways that no longer support the old API (despite vmware itself still supporting it).
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<klange> QEMU is slightly more generous, as it will modeset but refuses to automatically flush the display unless you start talking to the fifo.
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<klange> VirtualBox will update the framebuffer but not perform modesetting without the fifo communication?
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<klange> VMware happily accepts that I am version 0 of the API, modesets, and flushes the framebuffer regularly - as long as I don't ["correctly"] tell it I'm version 2, then it wants fifo updates.
<klange> So... I'm going to not touch the vmware driver, and users should listen to virtualbox when it says not to use vmsvga unless recommended by the guest configuration.
<j`ey> klange: FYI on my vbox, vmsvga is the default
<j`ey> and if i select vboxvga it says 'blah blah, vmsvga is recommended'
<klange> It depends on what you select as the guest OS type.
<klange> What version of vbox?
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<klange> I am on 6.1 shipped through Ubuntu, guest OS set to "Other/Unknown (64-bit)" (so nice for that to be accurate).
<j`ey> ah my gues type is linux/oracle
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<j`ey> also 6.1
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<klange> Yep, does look like Linux guest selection does recommend VMSVGA - confirmed with my Ubuntu test VM.
<klange> Everything else it defaults to VBoxVGA - Windows, BSD, one of this is configured for macOS (but it's not)... and all the unknowns.
<j`ey> well I guess I got lucky :)
<klange> Hm, oh VMware was the one I used to recommend configuring for 64-bit guest even in toaru32... I think because it switches the default NIC from one I didn't have a driver for to the e1000.
<klange> Still uses that dang ensoniq ac97 that I have no idea how to talk to the codec on...
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<klange> The ICH9 support in VirtualBox is also "broken" - it doesn't have legacy support, so it gives garbage interrupt lines for PCI, it doesn't present a host bridge at all (possibly to convince legacy OSes to just not try to do PCI?)...
<klange> iommu or msi will probably fix that for me...
<klange> Come to think of it I didn't actually fix the issue that triggered... I just patched around it. Reading /proc/pci faults if there's nothing in it (I changed the scan technique if it didn't find anything from a sane bus scan).
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<warlock> I'm having a lot of trouble with uefi, it seems to boot, cause I insert a loop in the file, but anytime I use the OutputString when it boots, it enters a reset loop
<warlock> anyone had a problem with that?
<vdamewood> Not me.
<klange> My first thought would be are you sure you've got the ABI right...
<warlock> I believe I do
<warlock> I made the structs by hand though
<warlock> from the EFI_SYSTEM_TABLE + 0x3c which should be ConOut
<warlock> and I'm calling that + 0x08 which should be OutputString
<warlock> maybe I'm wrong I really don't know
<klange> Is this x64?
<warlock> yea
<klange> What compiler?
<warlock> fasmg
<warlock> it's assembler
<klange> Are you doing correct ms calls?
<warlock> I believe so, the 2 params in rcx, rdx
<warlock> and calling the runction
<warlock> and calling the function
<warlock> rcx being the pointer to the EFI_SYSTEM_TABLE, and rdx being the pointer to the wstring
<klange> rcx should be the pointer to the conout, not the system table
<warlock> yea excuce me, it is conout
<warlock> my bad
<klange> Can just run down a list and help rubber-duck here... getting your input args to your entry point right? ImageHandle in rcx, SystemTable in rdx...
<warlock> yes those are correct
<moon-child> warlock: by my count is 0x38
<klange> i was still pulling up the header >_>
<moon-child> oh, wait, maybe padding
<moon-child> no, I was right. offsetof agrees
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<warlock> well what it is, I seen, FirmwareRevision was a dword
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<warlock> I'll just try that, can you link me to that
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<moon-child> try what? I'm using a c header, so I don't know how much help it will be
<klange> 16 for the header, 8 for firmware vendor, 8 because of padding for for firmware revision, 8 for consoleinhandle, 8 for consolein, 8 for consoleouthandle...
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<warlock> oh my header must be wrong then
<klange> yeah I count 0x38 as well, try that
<moon-child> no the header is 24
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<klange> oh yes
<warlock> yea that's what I got 0x24
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<warlock> or wait
<moon-child> decimal 24 :P
<klange> That should put things at 0x40
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<warlock> it's 0x18
<moon-child> http://ix.io/3q77
<moon-child> oh no you're right, 0x40
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<moon-child> (see, this is why I don't use assembly :P)
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<warlock> ok ok
<warlock> yea I'm not padding
<warlock> revision
<warlock> that must be it
<klange> offsetof(EFI_SYSTEM_TABLE, ConOut) = 64
<bslsk05> ​gist.github.com: efi-conout.c · GitHub
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<warlock> ok well I'll look over the spec, basicly it's something wrong with my structures, got it thanks
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<warlock> well that's obviously the problem
<warlock> thanks a lot, it was driving me crazy, I'm able to clear and print
<warlock> I guess I just didn't know it FirmwareRevision was padded
<warlock> it said it was a 32 bit number
<warlock> anyway
<klange> This is why I much prefer layout listings with _offsets_, but EFI had to go and be a software API defined in obtuse C headers while also using structs with platform alignment rules...
<warlock> yea I like the specs when they include offsets too
<moon-child> amen to that
<warlock> just so you know, I been stuck on this for basicly 1 1/2 days, I should asked way earlier, but I was thinking I could figure it out
<gog> i was just thinking about that like 32-bit uefi is a thing
<moon-child> I had an alignment bug early on with efi. Wasn't sure where the padding was supposed to be, or if it was supposed to be there at all. Wouldn't have been a problem if they'd listed offsets
<warlock> yea
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<moon-child> gog: huh, come to think of it, I wonder if any motherboards supporting 32-bit cpus support efi. Probably not. SO it's exclusively for 64-bit cpus running in compata mode
<warlock> really I have done every other boot, just thought, might as well learn uefi so I know them all, but it wasn't working
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<gog> moon-child: that makes more sense
<warlock> at least I think I know them all now
<moon-child> but like, 32-bit linux is barely a thing. 32-bit windows I guess has 16-bit compat, which the 64-bit version doesn't? I don't really see the point...
<warlock> well it says, if I made it boot.efi it would boot 32 bit right
<klange> no, it would just ignore it
<warlock> oh
<klange> efi has no platform requirement for backwards compatibility
<warlock> I never even tried
<klange> which is why I shipped a 64-bit EFI loader alongside a 32-bit one, the 64-bit one jumped back to protected mode to run toaru32
<klange> Now I need to clean all of that up and get a reasonable 64-bit one going again... preferrably without the jump back down even though my current kernel is multiboot-compatible and all set up to bootstrap itself into long mode...
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<doug16k> warlock, there is a 32 bit build of ovmf
<doug16k> you could point qemu at that, and it would be 32 bit uefi
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<klange> Alright, still terrible, but have stable streams with the lazy drop approach, and some things are handling timeouts better... can reliably get gcc to download
<klange> need to investigate why things are very slow in virtualbox under slirp, wondering if it's a driver issue... vmware won't let me get tcp connections out because I'm cheating on broadcast address at the moment...
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<ZenixOwler> question, when i run a program in the form of an executable, is there any service or section of an OS that is in charge of loading it into memory and reading its instructions line by line ?
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<GeDaMo> It's the CPU that executes the instructions
<ZenixOwler> yea but doesn't some part of the OS has to load it into memory first then send each machine code line of it into the CPU for processing ?
<GeDaMo> The OS loads the file into memory and jumps to its start point
<GeDaMo> The CPU automatically reads the next instruction from memory
<ZenixOwler> oh, i guess it set the RIP register inside the CPU to the next memory address on memory ?
<GeDaMo> Or wherever control flow instructions like jmp or call set the instruction pointer to
<ZenixOwler> yea but still, isn't there any part of the OS which is in charge of setting that RIP register ? or this is a bit too broad question which can only be understood if i try to create my own OS
<GeDaMo> The instruction pointer will be set to the entry point of the executable when it's first loaded
<heat> ZenixOwler: the OS sets the RIP register for the first instruction in however way it needs to(arch dependent) but then the CPU just manipulates the RIP as it wants to
<heat> the OS isn't magic, it's also instructions
<ZenixOwler> yea but i hardly imagine how the OS itself, a software being build with instructions, can handle other program's instructions being ran inside it
<ZenixOwler> does this require some advanced knowledge in asm maybe ?
<GeDaMo> Not really
<heat> instructions don't run inside the OS
<GeDaMo> Machine code is just bytes in memory
<heat> note how you say a program runs *on* and not *in* an OS
<ZenixOwler> yea ok, i think i might imagine it, but still, there are lots of daemons running and i haven't even talked about user-programs, how can the CPU split up the resources and runtime between all of those ?
<ZenixOwler> i mean basically i am having like over 3 applications running at the same time right now
<ZenixOwler> also this is something else, not original from my beginning question so sorry if it's randomly asked
<GeDaMo> Virtual memory means each process can have its own separate address space
<GeDaMo> So each process only sees itself and the kernel in memory
<j`ey> ZenixOwler: each process runs for a little bit of time
<j`ey> then the OS interrupts it, and resumes another process
<ZenixOwler> Huh, interesting, does it keep tracks of each process in some sort of, table maybe ?
<ZenixOwler> so it can keep on resuming
<heat> yes
<ZenixOwler> what is the table called and also this process of interupting please ? i will try to find some videos and books to research about it
<ZenixOwler> also virtual memory :P
<heat> there's no single table and OSes have different ways of doing stuff
<heat> as you may guess
<dh`> realistically what you want is a textbook
<heat> so just search for thread scheduling and task switching and you should be fine
<ZenixOwler> dh`,: textbook ?
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<j`ey> ZenixOwler: context switch
<heat> yeah you have several good OS development books that you can try and follow
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<heat> it's a way to do things but generally not needed
<heat> I've never opened one for example
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<ZenixOwler> heat: yea, i am trying to remake something simple as TinyCore OS, even tho it already exist but i still wanna know the process of building a functional OS, even if it's simple :P
<ZenixOwler> if there is a book which guides me to there tho, it'd be nice
<heat> you mean tiny core linux?
<ZenixOwler> yea, that one
<ZenixOwler> the most lightweight distro among three of its releases
<heat> yeah you can get there
<heat> it's hard though
<ZenixOwler> i can tell
<heat> keep that in mind
<ZenixOwler> lots of concepts to know
<heat> I've been on this for what, 6 years?
<ZenixOwler> and i could touch pointers a lot since it's in C
<heat> and I'm still missing a lot of what makes an OS usable
<heat> my greatest achievement until now was getting gcc to work
<ZenixOwler> also does that require me to like, re-make the Linux kernel becuz i don't feel safe doing that, or just do my own coding then combine it with a Linux kernel
<heat> well I was assuming you want to write a kernel
<heat> since we're talking kernel-level concepts here
<ZenixOwler> well i don't think starting off that way is a good way, maybe first i will try with an existing kernel, then write my own later
<heat> that's a distro then
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<dh`> the advantage of a textbook is that it gives you a basic overview of everything
<ZenixOwler> heat: well but i still have deal with the bootloader, getting concepts of things like BIOS or UEFI to make my distro bootable, and setting my CPU to which memory address that my kernel and programs live, still hard tho
<ZenixOwler> even if it's just a distro
<dh`> but anyway figure out what your objective is first
<heat> ZenixOwler: what
<ZenixOwler> heat: yea i might confuse u there
<heat> "and setting my CPU to which memory address that my kernel and programs live" is nonsense
<ZenixOwler> i mean the RIP of the CPU still have to know where my OS starts right ? in order to execute its code
<heat> no
<heat> you seem to lack understanding of how a CPU works
<dh`> well, it does, but the bootloader does that
<heat> I'd start there
<j`ey> ZenixOwler: if you want to make a linux distro, you dont really need to learn such low level details
<dh`> they do, because it's impossible to understand (correctly) how the pieces of a linux distro fit together without understanding basic stuff about how everything runs
<ZenixOwler> well i feel like this might take ages to explain in the IRC chatbox, is there any good book which can guide me through my process of building my own distro ?
<ZenixOwler> would appreciate any recommendation tho :P
<j`ey> ZenixOwler: have you looked at Linux From Scratch?
<ZenixOwler> oh, didn't know it exists, let's me see then, thank
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<ZenixOwler> j`ey: well there sure are lots of results on google, just to make sure, is this it : https://www.linuxfromscratch.org/lfs/downloads/10.0/LFS-BOOK-10.0.pdf
<j`ey> yeah
<j`ey> i dunno about that actual pdf, but the website
<ZenixOwler> ok thank then
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<immibis> https://news.ycombinator.com/item?id=27524641 - "Unreliability at Scale"
<bslsk05> ​news.ycombinator.com: Unreliability at Scale | Hacker News
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<immibis> summary: out of every 50000 cores or so in a google/amazon/facebook datacenter, one of them probably has a broken instruction that computes wrong results
<geist> makes sense really
<kazinsal> sounds like the kind of thing you just cover up as "emergent behaviour"
<immibis> (and one in XXXX of those broken instructions is one that you really need for your massive distributed algorithm. Apparently a cosmic ray brought down S3 for a day once)
<kazinsal> it's a new self-selecting logic balance and quorum method that allows for innovative silicon-derived computational pathways
<geist> neat
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<geist> immibis: do be fair i think i read that one as the nic was continually flipping bits
<geist> i've actually had that exact problem before: a nic that has checksum offloading with some sort of PCI bit level corruption
<geist> so you'd send it a packet and it'd just corrupt things on the way out (or in) but the packet on the wire was properly checksummed
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<geist> i noticed it becase i was getting weird ass screwed up dns responses, and sometimes bad SYN requests or whatnot. lots of the times the stack would silently retry, but since they weren't coming through as checksum failures the stack would just take it as good packet
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<Bitweasil> Ew, that's *evil*.
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<kazinsal> took a half hour meeting out on the balcony with the new M1 and only lost about 5% battery. really impresed
<kazinsal> impressed*
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<sortie> I have coffee
<sortie> I had ice cream on the balcony and it was 100% gone after 5 minutes
<kazinsal> :D
<gog> i was telling my wife yesterday that ice cream and coffee is the best combo
<gog> i might need to satisfy this craving soon
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<gog> coffee with coffee-flavor ice cream
<gog> for the extra beany goodness
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<kazinsal> cold brew float
<kazinsal> mmmm
<gog> that would be tasty
<jeaye> Had a scoop of coffee cashew praline with a scoop of chocolate fudge browney recently. It was really good.
<jeaye> At the local Salt & Straw.
<jeaye> s/ney/nie/
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<gorgonical> Why might my kernel be stalling when ldrb from the serial address?
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<doug16k> what do you mean by stalling, exactly?
<doug16k> slow or stops?
<gorgonical> A hang
<gorgonical> A stop
<doug16k> does it go into an infinite exception loop?
<gorgonical> Maybe? When I do info registers I don't see anything out of the ordinary, but I'm new to reading the arm64 dumps
<gorgonical> The only thing that stands out to me is that next to the PSTATE I have EL1h
<gorgonical> Which suggests "halt in EL1" ?
<gorgonical> This is basically the second instruction that's executed in the kernel
<doug16k> then you obviously have no exception handling yet
<doug16k> EL1 is what you expect then
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<doug16k> EL0 is user
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<gorgonical> The head.S code wants to write stuff to serial. The first address is getting the address of the pl011, which is like 0x90000000. Then it does ldrb from that
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<doug16k> 1st instruction loads 0x900000000 into a register?
<gorgonical> yeah. ldr x14, 0xsomewhere
<gorgonical> then x14 contains 0x90...
<doug16k> 1st instruction works? you checked?
<gorgonical> info registers shows x14 contains it
<doug16k> ok
<doug16k> I was speculating that it could have linked funny and didn't get the constant correctly
<gorgonical> Tbf I don't know if it's just that it's loading from the uart really fast and never exiting the loop
<gorgonical> and w17, w17, #0x20 and then cmp x17, #0, b.eq somewhere else
<gorgonical> So 0x20 is space, so it's just looking to see if the uart is cleared, right?
<doug16k> why doesn't anyone love cbnz and cbz?
<doug16k> I constantly see code that code use it, not using it
<gorgonical> So the pl011 manual says that 0x14 is reserved
<doug16k> could use it
<gorgonical> So trying to read or write from x14, 0x14 should probably break, yeah?
<doug16k> break is a stretch
<doug16k> you should turn on pl011 traces
<doug16k> -trace pl011\*
<doug16k> qemu doesn't freak out when you do nonsensical register access, from what I have seen
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<gorgonical> Should it just print events to the monitor? I'm not seeing a command to see the traces
<doug16k> yes
<doug16k> look at this output for a sec: qemu-system-aarch64 -trace help | grep pl011
<sortie> Tonight I am doing canonical osdev.
<doug16k> if you pass -trace pl011\* it means, enable all traces that match the glob
<doug16k> careful bash doesn't expand pl011*, that's why \
<gorgonical> Right
<sortie> That is, making sure my kernel syscalls accepting a struct timespec have 0 <= tv_nsec <= 999999999. Otherwise.. bad times for everyone.
<doug16k> gorgonical, I used that trace in my rom project. works
<gorgonical> oh I have the separate monitor so the escaped asterisk was confusing it
<gorgonical> retrying now
<sortie> I also have coffee. What's going on in here? I see gorgonical and doug16k debugging cursed things :)
<gorgonical> well it is in fact reading from it
<gorgonical> so I'ts just some loop then
<gorgonical> getting 0x0 out of it.
<doug16k> is it polling for input?
<gorgonical> the macro is "wait_for_xmit" and it's polling until whatever comes out ands with 0x20 to be 0
<bslsk05> ​pastebin.com: .macro wait_for_xmit, port1001: ldrb w17, [\port, #0x14] and w17, w1 - Pastebin.com
<doug16k> that seems to be the "receiver holding register not empty" bit if I had to guess
<doug16k> or could be polling for transmitter holding register empty
<doug16k> yeah wait_for_xmit says it
<doug16k> in qemu, pl011 is infinite speed. you can just blindly write the data register as fast as you like, without checking anything
<gorgonical> sounds like it should be polling the receive status register, then
<gorgonical> or the flag register?
<doug16k> that code is meant for a real machine, where serial is far from infinite speed
<gorgonical> if we're waiting for xmit we are checking that bit 7 of the flag register is set
<bslsk05> ​developer.arm.com: Documentation – Arm Developer
<gorgonical> which would indeed be 0x20
<gorgonical> But I think the bug here is that the address offset is wrong, lol
<doug16k> trace says what it is reading
<gorgonical> pl011_read addr 0x00000014 value 0x00000000
<doug16k> supposed to be 0x18
<bslsk05> ​developer.arm.com: Documentation – Arm Developer
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<kazinsal> sortie: They appear to be deep in their cursed debugging session, yeah.
<sortie> kazinsal: :)
<gorgonical> Okay... So why then does w17 never receive the value?
<gorgonical> >:(
<kazinsal> Meanwhile I've been taking meetings outside today because hooray for having an actually modern laptop now!
<kazinsal> Though now I have to do a bunch of sysadmin work instead of enjoying the sunlight :(
<sortie> Wow :)
<kazinsal> I'm on vacation next week so everything has to be either "on hold", "waiting customer" or "waiting vendor" by the end of the week.
<kazinsal> But that means I can do a whole bunch of osdev stuff next week, hooray!
<sortie> Yay
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<gorgonical> After re-reading the code I'm actually confident it's wrong
<gorgonical> Read from flag register. Check if bit 5 is set (0x20). If flag register AND 0x20 is 0, go back. What's bit 5? Bit 5 is *set* if the tx register is full. So we want to wait if the result of flag register AND 0x20 is 1!
<gorgonical> This loop does the opposite of what it says it does
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<travisg> kazinsal: hah same thing, taking meeting soutside
<travisg> but mostly because it's nice
<kazinsal> I'm sure the novelty of it will wear off for me eventually
<kazinsal> but at least for now it's rad to be able to sit and nod at a camera for 30 minutes in the sun
<geist> yah now my relatively ancient (2015) work laptop is starting to show its age because it seems to only be able to run vid chats on the battery for maybe 2 hours
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<klange> Eh, I think my T410 (2010) got about two hours of reddit (digg? was 2010 long enough ago for that?) stock, and that was with the tumor battery.
<klange> Battery life is probably the one thing that's dramatically increased in the last decade.
<klange> Both from battery cells and lower power consumption in hardware.
* dissident ponders the idea of "tumor battery" with some trepidation
<klange> The ThinkPads of that era somewhat famously had options for extended batteries that stuck out the back.
<dissident> understood
<klange> I actually still have mine but it's lost about 50% of its advertised capacity... I think it's full of standard cells, though, so I might pop it open and replace them.
<klange> I got a cheap third-party replacement on Amazon and it works but despite being the 'normal' size option it's somehow uglier than the extended battery from poor construction and fitment.
<klange> 18650s have gotten better, so I might even be able to get _more_ battery life out of this than when it was new...
<kazinsal> I did the whole amazon-battery thing for my T420 for a while but eventually the power regulator for the DC input started being finicky
<klange> If I'm reading the labels here right... 9 cells giving 8400mAh nominal... suggests <1000mAh per cell, which is quite low. Could double or even triple that with new cells.
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<klange> I also got a kit to replace the battery in my old MacBook, but that's a different story... internal, non-standard flat cells, and the curent one is bulging. And while the ThinkPad is a fun toy to run my OS on, the MacBook I actually "need" to throw damn mad beats because it's the only portable thing I have that doesn't randomly choke on external audio.
<klange> down*
<klange> nice typo...