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<uvos> i think we should think about defaults a bit more
<uvos> like ppl i hand the bionic (which runs defaults) get confused with how the power button works
<uvos> or how we all install simple-brigtness-applet because going into the settings to change the brigtness is pretty lame
<Wizzup> mhm
<freemangordon> uvos: what's wrong with how power button works?
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<sicelo> doesn't follow android standards
<freemangordon> ah, I see
<sicelo> short press = lock/unlock. long press = system/boot options
<uvos> having to double click to turn the dsiplay off but click once to turn the dsiplay back on
<uvos> messes with peoples muscel memory form android and ios yeah
<uvos> theres nothing wrong with it per say
<dsc_> how does the automatic brightness works?
<uvos> dsc_: wdym
<sicelo> dsc_: ALS sensor, as always :-)
<dsc_> gotcha
<Wizzup> uvos: I think eventually we will want to rework some of how the status applet works from UX pov, because eventually it just "fills up" with applets
<Wizzup> but that is a 2022 or 2023 thing :P
<sicelo> do they begin scrolling when you have many of them? i've never had a lot of them, so i never really noticed
<Wizzup> even if they scroll it doesn't work
<Wizzup> as in it's just not ok
<Wizzup> I mean from usability pov
<Wizzup> if you install wireguard and tor status applet you already get two more
<Wizzup> it fills up
<RedW> 7
<sicelo> 8
<sicelo> :)
<RedW> oops, wrong window :)
<dsc_> how do I CTRL^D with a droid 4 :D
<uvos> Wizzup: the status applet runs the applets in a hildon-pannable-area
<uvos> thas why the slider is broken
<dsc_> got it
<uvos> (hildon-pannable-area reports event coordinates wrong)
<uvos> Wizzup: so id be suprised if it dosent start scrolling
<uvos> aka its a bug if it dosent
<uvos> wireguard and tor status applet should ony appear if they are configured really
<uvos> btw
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<freemangordon> :nod:
<Wizzup> uvos: no, because you can activate them in system mode at any time
<Wizzup> I am talking about the status area button
<freemangordon> not only configured, but active, no?
<Wizzup> and the way to activate them is through that button
<Wizzup> freemangordon: the icon in the status area, yes
<uvos> no sure how having the status area button makes sense
<uvos> if thereis no vpn configured
<Wizzup> right so I was talking about that window with the buttons
<freemangordon> ok, but I don;t think scrolling is that bad there
<Wizzup> freemangordon: ok, I never tried
* uvos confused
<freemangordon> Wizzup: the point is that buttons should not be there unless those are active
<uvos> what window with buttons? not hildon-status-menu?
<Wizzup> uvos: I think we're on the same page, I do mean hildon-status-menu
<uvos> right thos buttons shold only be there if activating the vpn is a possiblity
<uvos> ie its configured
<Wizzup> freemangordon: that is not true for internet connection, or profiles, clock, bluetooth
<freemangordon> Wizzup: what is the functionlaity of those buttons?
<Wizzup> freemangordon: to enable tor/wireguard system wide for an active connection
<freemangordon> ah
<Wizzup> there's also the openvpn one btw
<freemangordon> well, yeah, ok
<Wizzup> it might make sense to 'group' them eventually
<freemangordon> I wonder if status menu supports groups
<Wizzup> but that's a whole different thing
<Wizzup> in any case 2022/2023 :P
<freemangordon> I wouldn't be surprosed if groups are already supported
<freemangordon> bu yeah, 2023
<freemangordon> :)
<uvos> Wizzup: "uvos: no, because you can activate them in system mode at any time" yeah but what happens if i activate a vpn but there is no account configured?
<uvos> ie just haveing the applet installed i have it in hildon-status-menu
<uvos> ie the workflow that makes sense to me is: open settings -> configure a network -> now the button pops up in status-menu for me to enable or disable it. anyhow ttyl
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<Wizzup> uvos: I guess for tor you don't need an account
<Wizzup> but yes for wg or openvpn this is true
* sicelo also doesn't see ux problem with scrolling in status area - android scrolls it too, ios too. it's unavoidable. and yes, best way to manage it is just to avoid having too many things there, especially inactive ones
<bencoh> well, to be fair on android you usually need to scroll for notifications
<bencoh> not for always-displayed plugins
<sicelo> at least on my android 8, when pulling down the notification drawer (which contains what is roughly hildon's status menu), i can only select among 5 items. then, as i continue pulling it down, more of them appear. in my case, 9 more appear
<sicelo> so i guess if we take android as a benchmark for status menu, hildon problem is that our items individually take a lot of space, and thus two per column, so it fills up fast as a result
<bencoh> yeah, a compact layout/mode would probably help here
<freemangordon> hmm, one cannot allocate TILER BOs through dma_buf API
* bencoh headscratches
<bencoh> how are you supposed to allocate it then?
<freemangordon> bencoh: omap_bo_new
<freemangordon> which is omap specific
<bencoh> uh
<bencoh> sad
<freemangordon> yeah
<freemangordon> IIUC you can;t use gbm_bo_create and get a TILER BO
<freemangordon> which leaves us with the only option to use xf86-video-omap if we and sane performance with rotated display
<freemangordon> s/we and/we want
<bencoh> or add full dmabuf support to the omap/tiler/whatever drivers galaxy
<bencoh> (at least to the point where one can allocate tiler buffers)
<freemangordon> I don't think I am the one to do that
<freemangordon> not without some hints from the maintainers
<freemangordon> I wrote a mail, still no answer
<bencoh> I wonder if there is any reason notto default to tiler buffers on omap4/omap5
<freemangordon> no idea
<freemangordon> but dma_buf defaults to CMA
<bencoh> hmm
<bencoh> don't you just mmap() on some fd to get buffers?
<freemangordon> it is not that simple
<bencoh> well, and/or use some ioctl before/after
<bencoh> anyway, it should still be bound to some device
<freemangordon> the point is that SGX(for example) should see the same memory correctly
<freemangordon> but, there is a note that TILER memory is shmem memory
<freemangordon> I don;t understand what is that supposed to mean
<bencoh> yeah, I get that part, I'm just wondering what actually happens when you allocate a dmabuf-able buffer
<freemangordon> I don;t
<freemangordon> so please explain what "shmem" is
<bencoh> shmem, as in /dev/shm, or as in "memory shared between cpu and sgx, and mapped at the same address"?
<bencoh> (ah, I wrote that "I get that part" before you mentioned shmem btw)
<freemangordon> but how it can be mapped at the same address, given that SGX has its own mmu?
<bencoh> they could set it that way
<bencoh> no tiler there, right?
<freemangordon> mhm
<freemangordon> and no way to tell it to be
<freemangordon> the only way to use the tiler is to pass flags through userspace API
<freemangordon> omap_bo_new()
<freemangordon> but, your question is absolutely valid - why all BOs are not allocated through the tiler?
<bencoh> I guess it wouldn't make any sense on non-tiler platforms
<bencoh> but still
<freemangordon> this is omapdrm which supports TILER rotation only
<freemangordon> lets forget about omap3 for a while
<bencoh> ah :)
<freemangordon> tmlind: any clue? ^^^
<bencoh> then yeah, I don't see why
<freemangordon> for VRFB it is another story
<freemangordon> because we have limited contexts (12 on omap3) so it makes sense to assign VRFB context to BO only when really needed
<bencoh> unless ... if TILER has a limited number of "buffers"
<freemangordon> yeah
<freemangordon> but I was unable to find the TRM to see how this works
<bencoh> hmm, I think I downloaded the TRM at some point, lemme check
<bencoh> iirc TI removed some manuals from their website right?
<freemangordon> and because my knowledge on DMA API and MMUs ends here (or rather has ended 200 meters before here) I don;t know if it is possible to somehow "migrate" non-tiler (or non-vrfb) BO to TILER one
<buZz> zmatt used to be the TILER expert
<bencoh> meh, I have the omap3530 one here, no omap4
<buZz> back in #dragonbox-pyra
<sicelo> omap 4 trm? i have it
<freemangordon> buZz: it is not about the TILER, but about how the rest of the system sees such a buffer
<bencoh> right, zmatt had it work by kludging part of the driver(s), I don't think it ever got merged. and that was on omap5
<bencoh> oh, found it on the desktop I'm connected from, silly :)
<bencoh> (uploading it ...(
<freemangordon> like - we allocate a non-TILER BO that is send to SGX
<freemangordon> SGX sets it MMU to access that BO
<sicelo> ah, you'll be faster (bencoh). was sending it to dropbox just now
<bencoh> sicelo: yeah I figured :)
<freemangordon> now, if we want to transform this BO to a TILER one, how SGX knows this change has happened to re-program its MMU?
<freemangordon> the same goes for VRFB though
<freemangordon> ok, good to have that
<freemangordon> but, IIUC, TILER is just a kind of iommu
<freemangordon> like, it remaps memory accesses, no?
<freemangordon> so, implementation details are not important
<freemangordon> also, even if TILER has unlimited 'buffers', VRFB does not, so we are in the same situation
<bencoh> looks like TILER is actually a rotation engine as well
<freemangordon> like VRFB
<freemangordon> and yes, R in tileR is for rotation :)
<bencoh> but yeah, it's basically all about address transformation
<bencoh> meaning that it doesn't really "perform" the rotation, it "just" translate addresses to effectively return the pixels that should be addressed after rotation
<bencoh> or so I understand it
<freemangordon> my understanding is the same
<bencoh> which is kinda funny, because it means that any access to a "rotated" buffer will go through it
<bencoh> I wonder how expensive (energy-wise) that thing is
<bencoh> maybe that's the reason it's not enabled by default btw
<bencoh> either that, or erratums that make it buggy
<bencoh> errata*
<freemangordon> as simple address translation should not be that expensive
<bencoh> dunno, maybe you're right
<buZz> freemangordon: ah well, just saying it might not hurt to ask him for things that lack in understanding
<buZz> guy works with TI stuff a -lot-
<bencoh> another thing is ... what happens when it tries to access memory ....
<freemangordon> we have a page fault
<freemangordon> :)
<bencoh> no I mean ... let's say you access a "rotated" buffer
<bencoh> so it goes and fetches the right pixels(bytes) for you
<bencoh> but instead of fetching a full line from RAM, it needs to fetch a "column", ie a pixel from every actual line
<bencoh> doesn't sound super efficient to me, unless it actually fetches the full lines and caches it
<freemangordon> I doubt it can cache 540x960x4 even for non-rotated scenario
<bencoh> maybe it only caches macroblocks then
<bencoh> otherwise it really sounds like a pain
<freemangordon> but, I don't know how this stuff works, so...
<freemangordon> they say TILER works on pages only
<bencoh> yeah, me neither ... I never brought myself to actually read the whole TILER chapter
<freemangordon> also, there was some note of 'no caching for TILER' somewhere
<freemangordon> lemme try to find it
<bencoh> noncached access on ARM really doesn't sound like something we would want
<freemangordon> not sure what is that supposed to mean
<bencoh> ~(OMAP_BO_CACHED|OMAP_BO_WC|OMAP_BO_UNCACHED)
<bencoh> so, it disables cached *and* uncached? :]
<freemangordon> exactly :)
<freemangordon> well, there is a call to tiler_get_cpu_cache_flags()
<bencoh> interestingah
<bencoh> meh, so yeah, uncached
<bencoh> cpu_cache_flags is set to uncached
<freemangordon> hmm, on omap5 only
<bencoh> drivers/gpu/drm/omapdrm/omap_dmm_tiler.c .cpu_cache_flags = OMAP_BO_UNCACHED
<bencoh> oh, right
<freemangordon> for omap4 it is WC
<bencoh> yeah
<bencoh> interesting
<freemangordon> so, the same as for dma_buf BOs
<freemangordon> IIUC
* freemangordon is afk for a while
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<freemangordon> back
<bencoh> so yeah basically nothing inside the kernel uses the OMAP_BO_TILED_* flags
<bencoh> the only way to use it is to pass it from userspace as you said
<freemangordon> mhm
<bencoh> I dunno if it's just me, but I always get the same feeling everytime I need to look at kernel-side buffer/dma allocation code ...
<bencoh> (ETOOMUCHABSTRACTION :( )
<freemangordon> :D
<bencoh> especially caching stuff
<tmlind> no idea how OMAP_BO_TILED is used, i think the old ddk-1.9 used it via some custom ioctl
<freemangordon> tmlind: yes, it can be requested by userspace
<freemangordon> the point is - do you know why it is not there by default, for dma-buf BOs?
<bencoh> as far as I see it, the main difference between the two in _gem_new is a call to shmem_file_setup()
<bencoh> (and setting a few flags)
<tmlind> no idea, it could be just that omap5 had some issue for the tiler needing uncached configuration making it probably unusable
<bencoh> shmem_file_setup - get an unlinked file living in tmpfs
<bencoh> so it really comes from there
<tmlind> if some parts are not implemented, it could be because of 7cb0d6c17b96 ("drm/omap: fix TILER on OMAP5")
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<mighty17[m]> do we have nothing for pvr crashes https://paste.debian.net/1218824/ its really annoying
<freemangordon> mighty17[m]: did you try with https://github.com/freemangordon/mesa ?
<mighty17[m]> i've been using xc-racer's mesa till now
<freemangordon> use this one
<freemangordon> it is the same as TI blobs
<mighty17[m]> freemangordon: musl friendly?
<freemangordon> well, at least pvr_dri is
<freemangordon> yes, it is based on top of xc-racer's one
<freemangordon> look at commit log
<mighty17[m]> oh nice, i think i'll package it for pmos as well then :D
<freemangordon> well, test it first a bit :)
<mighty17[m]> is this the one with x working as well? :D
<freemangordon> yes
<uvos> *sortof
<mighty17[m]> :D im amazed by your work
<Wizzup> we all are ;)
<freemangordon> uvos: hmm?
<mighty17[m]> freemangordon: i wont be building mesa on cortex a9's xD, packaging is also safer to downgrade
<uvos> just hinting at that pvr_dri with mainline mesa dose support x but there is no ddx you can just use
<freemangordon> well, yeah
<uvos> ie x dosent work in practice with stock x
<freemangordon> rigth
<freemangordon> but, omap_drv works
<mighty17[m]> well its always blobs which are troublesome
<freemangordon> so we have DDX
<freemangordon> mighty17[m]: not this time
<freemangordon> we have no issues with blobs, but with modesetting/glamor
<uvos> i mean its the blobs too writ missing extensions
<uvos> but yeah glamor is a bit buggy on gles
<freemangordon> mighty17[m]: also, we all built mesa on omap4
<freemangordon> sure, it takes ages, but...
<mighty17[m]> is this a tradition? :P
<uvos> heh
<uvos> i reccomend disabeling mesa building other drivers than pvr_dri if you do
<freemangordon> no, this is how you become a mаn :p
<uvos> particually gallium/radionsi
<uvos> then its not so bad
<freemangordon> (or woman if you prefer)
<mighty17[m]> uvos: im pretty sure my tab will just randomly reboot in middle and kill all progress
<uvos> qemu then
<freemangordon> well, it is meson/ninja, so it will continue to where it was :). but yeah, you you have option to not build it on the device, go ahead
<freemangordon> *from where
<mighty17[m]> uvos: why not just cross compile?
<uvos> should work too
<uvos> just afaik pmos useses qemu for its dev env no?
<mighty17[m]> yeah it dies
<uvos> at least it used to
<mighty17[m]> does*
<mighty17[m]> well my laptop isnt powerful as well xD i5 3210m ivy league
<bencoh> mighty17[m]: may I ask what do you do with musl on droid4/leste/devuan?
<mighty17[m]> bencoh I'm using pmOS(alpine)
<bencoh> ah, right, nevermind :)
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<buZz> ^ nokia n950 anyone? :P
<Wizzup> last time I asked someone to donate one I got permabanned from ebay
<buZz> :D :D
<buZz> yeah 'plz donate your unobtainium to meeeee'
<buZz> Wizzup: might have more success asking ppl in #maemo :)
<Wizzup> I don't really need one
<tmlind> droid4 has obsoleted n950 :)
<tmlind> well at least for me
* tmlind used n950 for years until it started breaking for the lcd, then got busy with droid4
<freemangordon> I have a working one, but I need PVR driver for it :)
<tmlind> heh ok :) i'm pretty sure it was the 2016 elce in berlin when sre, pavel and i chatted about getting droid4 working as a n900 replacement hardware
<tmlind> freemangordon: did your rubber pads melt away on n950 into sticky mess?
<freemangordon> yes
<tmlind> probably possible to replace with some fuzzy pieces of felt
<freemangordon> yeah
<freemangordon> but doesn;t make sence without having SW for it :)
<tmlind> yeah maybe in few years
<freemangordon> yeah
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<freemangordon> [ 31318.703] (II) OMAP(0): Successfully initialized the "omap_pvr" sub-module
<freemangordon> :)
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<Wizzup> neat :-)
<freemangordon> hmm, how to test solid fill?
<freemangordon> ah −rect500
<freemangordon> hmm, seems omap_pvr_drv I found has solid acceleration removed :(
<freemangordon> I'll haev to implement that
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<uvos> historicly lots of exa implementations where slower than cpu only
<uvos> maybe the removed this because its perf was bad
<uvos> just wildly guesing here
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