03:38 <cr1901> _florent_: (or just black) Black is usually all 0s in a framebuffer, right? Is it possible for DRAM cells to degrade to 1 when they were initially 0? The capacitor leaks charge to GND, right? Where does the charge come from to make the bitline > Vdd/2 for the sense amplifiers?

11:53 <somlo> so I picked "optimal" (according to iperf bandwidth measurements) tx_delay and rx_delay values for my board's rgmii. I notice that after a few hours (during which there's no actual network traffic to/from the board) I can no longer ping in or out of the board

11:53 <somlo> other, "less optimal" values of tx_delay in the past didn't have this problem

11:54 <somlo> if anyone here is intimately familiar with how rgmii ethernet phy works - am I likely on the "too long" or "too short" side of my tx_delay value ? :)

11:55 <somlo> currently the plan is to "throw darts" in the general vicinity of my "best-for-iperf" value until I see it stop losing connectivity overnight, and go with that

14:43 <MoeIcenowy> ah about the DRAM refreshing issue

14:44 <MoeIcenowy> I remembered installing a 8GB DDR3 SODIMM on my STLV7325

14:44 <MoeIcenowy> and find LiteDRAM failing

14:44 <MoeIcenowy> (and finally I realized a bigger chip needs a longer time to refresh

14:44 <MoeIcenowy> and after tweaking the timing it works

14:44 <MoeIcenowy> maybe we should make the refresh time correspond to the longest possible on DIMMs?