_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<openpowerwtf> question about litex_sim: what's the best way to handle multiple uarts (beyond the normal core boot uart)?
<openpowerwtf> i could connect multiple lxterms using sockets - does litex sim support that directly or would i somehow build the top-level with uart interfaces like zipcpu uartsim or ?
<openpowerwtf> i was able to boot my 'core' (node+cpu's) in sim without any extra uarts, but on fpga i use aux gpio uarts with their own file pointers for individual core i/o. would like to recreate that in sim.
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