narmstrong changed the topic of #linux-amlogic to: Amlogic mainline kernel development discussion - our wiki http://linux-meson.com/ - ml linux-amlogic@lists.infradead.org - official channel moved from Freenode - publicly logged on https://libera.irclog.whitequark.org/linux-amlogic
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<lvrp16> The RTL8211F net watchdog bug is caused by u-boot net. If I disable u-boot networking, it doesn't occur. Might be the same MAC_CTRL_REG bug.
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<f_> I have a neat little trick for you. Want to crash my u-boot spl wip stuff easily and in a reproducible way? You can do so fairly quickly in a few easy steps. Step 1: load it from USB. Step 2: there is no step 2.
<f_> But be aware that this will work for a limited time only!
<f_> Yes, I am trying to get DFU up and running.
<f_> I stripped down pyamlboot to only load a binary to memory and let the bootrom jump to it
<f_> (SPI debugging is postponed for now.)
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<f_> And ugh don't tell me the DRAM clock was causing the thing to be unreliable....
<f_> I knew something was a bit off lol
<f_> so I guess lafrite now has okay DRAM init
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<f_> lvrp16: in configs/gxl_p241_v1.h on the downstream u-boot tree, there's a `#define CONFIG_DDR4_CLK 1080`, however the BL2 logs say `DDR4 chl: Rank0 16bit @ 1008MHz`, and I also had slightly more reliable init with that
<f_> out of date tree or?
<lvrp16> Lollllll
<lvrp16> I think 1080 uses looser timings and 1008 uses tighter timings.
<lvrp16> Both should be OK since it is 1pcs DDR4.
<lvrp16> I stopped pushing my luck with the IC lottery a while back.
<f_> both do init but the former sometimes doesn't work
<lvrp16> Some boards will run 1200MHz fine for days. Others, 1080. DDR3 it was 912.
<f_> I've a 512MB lafrite FWIW
<lvrp16> Iso timing or different timing? If iso timing, 1008 us much better I imagine.
<f_> possible I mixed up the timings though
<f_> ¯\_(ツ)_/¯
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