17:52 <minute> ok so there is hope yet for the bpi cm4 built in wifi. these people have gotten it to work fast https://forum.armbian.com/topic/44899-slow-wifi-speeds-on-banana-pi-cm4/

17:52 <minute> cc xdarklight

18:06 <minute> https://github.com/armbian/build/pull/7193/files

18:06 <minute> odd > /delete-property/ amlogic,dram-access-quirk;

18:38 <xdarklight> minute: umm, that would mean that the SDIO controller can access the DRAM. this is new to me! Cc narmstrong

18:41 <minute> i will test that out tomorrow

18:43 <narmstrong> Well amlogic probably fixed it in latest revision on a311d, but the bug was certainly present on the first revisions shipped in the vim3 and odroid n2

18:43 <narmstrong> So I’ll be extra careful when saying the property is useless on g12b

18:44 <xdarklight> narmstrong: interestingly hardkernel's mesong12a.dtsi has dmode set to pio: https://github.com/hardkernel/linux/blob/odroidg12-4.9.y/arch/arm64/boot/dts/amlogic/mesong12a.dtsi#L1562-L1572 but their mesong12b.dtsi doesn't: https://github.com/hardkernel/linux/blob/odroidg12-4.9.y/arch/arm64/boot/dts/amlogic/mesong12b.dtsi#L1589-L1597

18:45 <xdarklight> narmstrong: I'm not saying that you're wrong, I'm just surprised

18:45 <narmstrong> G12a affected and i don’t think they ever fixed it

18:46 <xdarklight> I think SM1 came shortly after G12A so they probably said "the fix is to use the new SM1 SoC"

18:58 <xdarklight> minute: I have no boards with an A311D SoC. however, getting around 50Mbit/s is what I'm seeing on my S905X3 (SM1 SoC) board with RTL8822CS

20:48 <minute> xdarklight: what's the SDIO clock frequency on that?

21:09 <xdarklight> minute: it's an X96-Air (meson-sm1-x96-air-gbit.dts) so these settings are applied: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi?id=98f7e32f20d28ec452afb208f9cffc08448a2652#n228

21:09 <xdarklight> minute: at runtime it chooses SDR104 at 100MHz IIRC

21:12 <minute> hmm 50mbit/s seems less than ideal in that case

21:26 <xdarklight> indeed. The RTW88 SDIO driver is the least optimized (compared to PCIe and USB HCIs). We're still missing TX aggregation for example (which would reduce bus transfer overhead) and I'm sure that the current RX implementation is far from being optimized