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<f_>
gxl, yes
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<f_>
lvrp16: IIRC you said that the most important feature missing was LZ4 compression, but is there anything else?
<f_>
(GXL)
<f_>
Speaking of TF-A BL31 I'll also remove support for loading the scp firmware since that's what relies on a non-standard params struct.
<f_>
It's either that or make changes to SPL to support that modified param struct, which will most likely not be upstreamable.
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<Kwiboo>
f_: agree, only looks like gxl loads scp using t-fa bl31, probably for same reason as other specifics of gxl bl2, to save code size of the bl2 blob
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<f_>
Kwiboo: most likely, yes.
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<f_>
Kwiboo: This is where I'm now thinking...why didn't they just make the size limit bigger in BL1?
<f_>
oh wait
<f_>
Some BL31 ports upstream send the SCP firmware in BL31..
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<f_>
So let's hardcode the base address!
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<lvrp16>
f_: for gxlimg, lz4 is missing. upstream we have the xz compression patch that we submitted a while ago
<f_>
Sure, but what about the TF-A port itself?
<f_>
Only LZ4 is missing?
<lvrp16>
you mean the PSCI code running on AO M0?
<f_>
No, I mean TF-A BL31
<lvrp16>
I have no idea, Neil and Jerome and Carlos probably have a better idea.
<f_>
sure
<f_>
I was asking about what's missing and needed for you
<lvrp16>
I used that for a bit but the lack of compression cause the u-boot to be over 1M so I dropped it. LBS still has support for it via a config flag.
<lvrp16>
because there was no BL2 u-boot implementation
<lvrp16>
now that there is, I think I can use the standard ATF, but I have to try.
<f_>
But yes, SPL will require upstream TF-A, unless someone really wants to patch amlogic's blob
<f_>
well..almost upstream
<lvrp16>
haha :D
<f_>
I'll need to patch that up a little..
<lvrp16>
so how is PSCI and AO handled? Does PSCI run on the main core?
<f_>
Mainly hardcode the BL30 base address instead of using a non-standard struct with it.
<f_>
lvrp16: /shrug
<f_>
Didn't look into BL30 yet.
<f_>
Still working on BL2
<f_>
Still have to fixup that DRAM code :D
<lvrp16>
:P
<f_>
Don't really want to 'waste' time on comparing my code with ghidra so instead I'll take the DRAM register dump I made on BL2 a long time ago and compare to SPL!
<f_>
and then look for these regs in ghidra
<f_>
I think in the end it's mostly stuff in dram-settings-gx.h being wrong sometimes
<f_>
but we'll see.
<lvrp16>
It'll be interesting for DDR tuning with pyamlboot
<lvrp16>
have you tried that with GXBB yet?
<f_>
Tried pyamlboot with gxbb?
<lvrp16>
DDR tuning with pyamlboot and a little bit of host script
<lvrp16>
DFU*
<lvrp16>
sorry not pyamlboot, DFU
<f_>
Didn't mess around with DFU yet.
<lvrp16>
I saw Neil's patches for it in u-boot
<f_>
but it's in todo
<f_>
lvrp16: yup
<f_>
I brought the idea of using dfu for SPL
<f_>
then narmstrong talked about snagboot IIRC
<lvrp16>
yeah just have a micro benchmark run, report the results, and then reset for another tune
<f_>
lvrp16: But yes, the SPL port will have support for DFU!
<f_>
lvrp16: oh, interesting
<lvrp16>
so the base protocol over USB is called worldcup?
<f_>
on GX* yes
<lvrp16>
so world cup -> SPL -> microbench -> reset -> world cup
<f_>
I'd probably call the implementation in ROM miniworldcup ;)
<lvrp16>
haha
<f_>
since BL2 is supposed to take care of the rest
<f_>
BL1 is just....load into memory and run IIRC
<lvrp16>
yeah
<f_>
BL2 is where the fun ends/starts
<lvrp16>
the DDR init is attached to BL30 right?
<f_>
not really
<f_>
BL2 does all the init
<lvrp16>
for the frequency and timing setting I mean
<f_>
but I believe BL30 also interacts with the DMC or DDR_PCTL regs
<f_>
What do you mean?
<lvrp16>
I thought the ACS stuff was appended to the BL30?
<lvrp16>
hence bl30_new?
<f_>
no, only bl301 is appended to bl30
<f_>
the acs.bin just replaces the stub acs structs in BL2
<f_>
if you run `xxd bl2.bin` and look for `acs__` you'll find it
<f_>
and you'll find a stub ACS
<f_>
acs_tool.py replaces that stub ACS with the one in acs.bin
<f_>
it's just painfully replacing stuff :D
<f_>
lvrp16: I do agree that that blx_fix.sh script is confusing and of quality
<lvrp16>
haha
<f_>
I mean..why does it need a temp /dev/zero?
<lvrp16>
so DDR init is in BL2
<f_>
Indeed.
<lvrp16>
gotcha, yeah that clears up my understanding
<f_>
But I wouldn't be surprised if BL30 also contained DDR-related code
<lvrp16>
I thought BL2 read a part of BL30 and then init the DDR.
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<f_>
also BL2 doesn't load BL21
<f_>
Shocking, I know...
<f_>
:D
<f_>
In all seriousness, BL21 and BL2 are both loaded by the bootROM
<f_>
and they're not even loaded separately
<f_>
it treats BL2+BL21 as a single BL2 binary
<lvrp16>
It's not a complicated SoC
<f_>
not too complicated :P
<f_>
which might be why amlogic SoCs are very common inside set-top boxes
<lvrp16>
simple is good :D
<f_>
simple is good, indeed
<lvrp16>
less inception in the bootloader
<lvrp16>
and mental gymnastics to understand it
<f_>
BL2 still does some useless things though
<f_>
as expected from a vendor :D
<lvrp16>
it's probably for the secure bits?
<f_>
*an SoC
<lvrp16>
There's interactions with the efuse no?
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<f_>
Yeah most likely
<f_>
but for the sake of running SPL it's useless
<lvrp16>
haha funny if you actually implement real secure boot
<lvrp16>
not security by obscurity
<f_>
haha
<f_>
but something also useless for the sake of running SPL:
<f_>
<Kwiboo> one thing missing that bl2 also does is read from saradc and write board id/hwid into AO_SEC_GP_CFG0
<lvrp16>
:P
<lvrp16>
I always wondered what that did.
<f_>
but then no one touches the board id :P
<lvrp16>
how do you know? BL30 could
<f_>
It most likely doesn't
<f_>
BL30 runs on my set-top box, without writing the board id/hwid
<f_>
Kwiboo: oh btw I think on gxbb it could be nice in the end to send the SCP firmware from BL31
<f_>
Looking at TF-A ports that's what they usually do, it seems..
<lvrp16>
yeah I need to rip out the SCP component from the full builder sometimes
<lvrp16>
I wish they were separate repositories rather than one monolithic builder
<f_>
You have SCP sources?
<lvrp16>
they're in the bl33 sources
<lvrp16>
part of it at least
<lvrp16>
scp_task and what not
<lvrp16>
so only half
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<f_>
Oh yeah scp_task is bl301
<f_>
Since "BL30" is deprecated in favor of "SCP_BL2"..SCP!