dgilmore changed the topic of #fedora-riscv to: Fedora on RISC-V https://fedoraproject.org/wiki/Architectures/RISC-V || Logs: https://libera.irclog.whitequark.org/fedora-riscv || Alt Arch discussions are welcome in #fedora-alt-arches
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<davidlt[m]> Conan Kudo: how is your Linux experience on MacBook so far?
<thefossguy> You eyeing one?
<davidlt[m]> Oh yes. I worked on AArch64 back at CERN, and I have been dreaming about this for a long time.
<davidlt[m]> It would replace my PineBook Pro :) Which is basically a fun toy.
<davidlt[m]> As soon as there is a proper riscv64 laptop I will get that too.
<thefossguy> Everything aside, repairability (not upgradability) is my main issue with Apple products.   
<thefossguy> Changing my NVMe at the very least 
<davidlt[m]> I have replaced multiple parts on my laptop, but I cannot replace a broken plastic part that holds lid hinge.
<davidlt[m]> Memory and NVMe (and potentially WiFi card) would be nice to have replaceable.
<davidlt[m]> But in general. I don't expect memory to be replacable long-term.
<davidlt[m]> It's gonna go more towards what Apple did. On a substrate, multiple channels, wide bus, smallest distance possible to lower the latency and get better signal integrity for those high speeds.
<davidlt[m]> There could be two tiers of memory. That existed already in some HPC products.
<davidlt[m]> Intel ADM also sounds cool. Sounds there could be a few GBs on L4 (or eDRAM like?) directly under the compute die.
<davidlt[m]> AMD announced something similar. Basically their 3D V-Cache will move below compute die.
<davidlt[m]> Recent rumours about AMD mega APU (finally) also suggest they will go similar route.
<davidlt[m]> Also DDR5 SODIMMs are already limited.
<davidlt[m]> You will not be able to get higher speeds on those.
<davidlt[m]> That's why Dell is pushing their new form factor to JEDEC IIRC.
<davidlt[m]> I just cannot believe we needed Apple to do something that already existed (and in rare cases was available in HPC).
<davidlt[m]> I recall using Intel Xeon Phi: https://colfaxresearch.com/knl-mcdram/
<davidlt[m]> That one had 16GB of MCDRAM on it (on package RAM).
<davidlt[m]> Going to DDR4 was a huge penalty compared to that MCDRAM.
<davidlt[m]> I think something else is coming back from the past.
<davidlt[m]> DDR5 MRDIMMs ( https://www.tomshardware.com/news/amd-advocates-ddr5-mrdimms-with-speeds-up-to-17600-mts ) kinda reminds me of IBM POWER8 centaur.
<davidlt[m]> There used to be those 16MB buffer cache (L4) on their custom DIMMs.
<davidlt[m]> So you really want memory as close as possible to compute, but you also want to address a large capacity (your general data).
<thefossguy> On board DIMMS are only acceptable to me if I get ECC too
<davidlt[m]> There was OpenCAPI (started with IBM, and became general).
<davidlt[m]> Now CXL seems to be dominated in this area.
<thefossguy> But yes, I agree with this being better and what the industry is moving towards
<davidlt[m]> It's gonna happen, it's just a question when :)
<thefossguy> The recent Tenstorrent event here had a huge emphasis from Tenstorrent about “everything on die”.
<davidlt[m]> Yeah, it's time to move more stuff closer or into the die.
<davidlt[m]> Well more closer, as we are in chiplet and 3D stacking era.
<thefossguy> I see it in less than 4 to 5 years. 6 to 7 if we’re talking about software maturity.   
<davidlt[m]> Well software will work, just not in an optimal way.
<thefossguy> Yes
<thefossguy> I meant the kind of software push when multi thread Zen was announced 
<thefossguy> This time in memory hierarchy than concurrency 
<davidlt[m]> For consumer (incl. pro users) that will probably mean memory on substrate. '
<davidlt[m]> I mean, Apple can place up to 96GB of that IIRC.
<davidlt[m]> And that's without heir quad-die chips.
<thefossguy> I think packages will be the next challenge 
<thefossguy> Already plans to tackle it, no?
<thefossguy> *packaging 
<davidlt[m]> Well, all the new advancements is packaging in my opinion.
<davidlt[m]> Well of course chiplet interfaces, efficiency, blah, blah.
<thefossguy> :D
<davidlt[m]> intel Ponte Vecchio has 63 chiplets :)
<thefossguy> I saw the die shots. Insane! 
<davidlt[m]> That has basetiles, foveros, EMIB, etc. all in one thing.
<thefossguy> Yeah
<davidlt[m]> I doubt this thing will make any money :D
<davidlt[m]> It's more like one large R&D experiment :D
<davidlt[m]> Building such things are possible, but it's probably not cost effective.
<thefossguy> R&D is an ongoing thing even for the most stable products.
<thefossguy> Thats how we innovate 
<davidlt[m]> Yeah, but when this lands in specific product is not dictated by R&D.
<davidlt[m]> It's a business decision.
<thefossguy> Agreed 
<davidlt[m]> We can build a way more powerful things (e.g. GPUs), like Ponte Vecchio, it's just no sense doing it.
<davidlt[m]> Who would buy a GPU if that would cost 20'000 USD? :)
<thefossguy> Side question since I am still learning: do the pkg names match up in Fedora and EL?
<davidlt[m]> Yes to my knowledge.
<davidlt[m]> If no, that's probably an exception.
<thefossguy> davidlt[m]: I would! But not at that price XD
<thefossguy> <davidlt[m]> "If no, that's probably an..." <- Thanks
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<rwmjones> dnf5 build ... succeeded!
<davidlt[m]> Nice
<rwmjones> but that doesn't help me because I wanted to see the failure :-(
<rwmjones> I'm going to look at the build log and try to intuit which of my F37 packages needs to be F38 ...
<davidlt[m]> You mean all tests passed?
<rwmjones> yup
<rwmjones> 100% tests passed, 0 tests failed out of 14
<davidlt[m]> Okay, in that case it's probably fine to disable the tests for now and let it build.
<davidlt[m]> Might be related to host + mock setup.
<rwmjones> the error is really weird, like a fakeroot failure except it's not using fakeroot/fakechroot
<rwmjones> anyway I'll keep poking it
<davidlt[m]> I think fakeroot or/and fakechroot also failed in the tests, but didn't look into them yet.
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