<bonda_000>
via typedef so peripheral register access is PERIPH->REG
<bonda_000>
ideally shouldn't need to write any assembly if we have a compiler and proper headers
<bonda_000>
good night I'm gonna go get some sleep now
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<clever>
ah, structs at each peripheral
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<dolphinana>
Hi, I haven't actually said this here until now, but today I'll actually be giving a talk called "Raspberry Pi's liberation progress" at LibrePlanet!
<clever>
the OTP can only be read with special functions
<bonda_000>
well it wrote that to RAM and now it computes to return false
<clever>
thats more that you dumped the state of the ram, not the OTP itself
<clever>
so it could have been changed by other things, and doesnt hold all of the OTP
<bonda_000>
yeah that's definitely dangerous to do then
<bonda_000>
plus this elf is "hand_made" so not everything I do with start_x.elf can be safely applied here
<clever>
the other problem, is if you tag a region of memory as read-only, then ghidra will make assumptions, based on the fact that it can never change
<clever>
but if it can change, those assumptions will be wrong
<clever>
i can see ~4 solutions to your baud rate issue
<clever>
1: just write to CM_VPU{DIV,CTL} and set it back to 19.2mhz
<clever>
2: re-compute the baud rate divisor for 500mhz
<clever>
3: just use the PL011
<clever>
4: measure the "wrong" baud rate with a scope/la (or math it out), and then just set minicom to that "wrong" rate
<clever>
its running ~26x faster, so that would simply be 3000000 baud
<clever>
1/3 are more bullet proof and will just work, no matter how it boots
<clever>
2/4 will only work if your booting via usb
<dolphinana_>
I'll soon be giving my LibrePlanet talk
<bonda_000>
I mean I will probably have to rewrite it again with bit fields defined but doing that when none of that is documented what those bit fields mean isn't much of a difference
<clever>
you probably want a seperate bootloader and kernel, because this first stage is limited to 128kb of code
<bonda_000>
good point
<clever>
you could also use either the closed bootcode.bin or the lk-overlay vc4-stage1 bootcode.bin
<clever>
[ 0.000000] INITRD: 0x00000000+0x0074e000 is not a memory region - disabling initrd
<clever>
ah dang, same problem you had!
<clever>
[ 13.803317] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
<clever>
going to watch a bit more tv, then take a stab at that
<clever>
2.367010 [LDR:read_file]: initrd: reading 7656797 bytes to 0x4000000 ~64mb...
<clever>
[ 0.000000] INITRD: 0x00000000+0x0074e000 is not a memory region - disabling initrd
<clever>
something seems corrupted there, i'll have to investigate more
<dolphinana_>
oooh, seems like things are going on o.o
<dolphinana_>
btw, someone asked me this question regarding librerpi: Was there any guiding principle of writing code (Keep It Simple Silly (KISS) or Don't Repeat Yourself (DRY) principle or pragmatism?
<clever>
mostly just whatever feels right
<dolphinana_>
I see
<clever>
and trying to make reusable functions when possible
<dolphinana_>
I'll forward this to the person who asked this question
<clever>
they basically sliced the stage1 in half, the new stage1 only does dram init, and the stage 1.5 deals with booting from sd/usb/tftp/nvme/https
<clever>
pi5 basically then just deleted stage3 from that graph entirely
<clever>
1.5 is now the final VPU stage
<clever>
deleted stage2*
<clever>
bbl, french fries and one more episode, then i'll get some codin done!
<dolphinana_>
sure
<dolphinana_>
enjoy your meal and that episode
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<clever>
and back
<clever>
first, let me rid up network boot...
<dolphinana_>
sure
<dolphinana_>
I'd like to do network boot one day, but now I'm tired...
<clever>
[ *** ] (1 of 2) A start job is running for�…conf update (27min 32s / no limit)
<clever>
dolphinana__: the clock is messed up, it already thinks 20 minutes have passed
<clever>
its not even been 3
<dolphinana__>
ooooh... weird...
<clever>
and its stuck in a loop, sshd isnt starting within the default timeout
<clever>
so it keeps murdering it and restarting
<clever>
i kinda want to boot it anyways, and see what ntp can do, lol
<dolphinana__>
mhm
<dolphinana__>
good luck clever ^^
<clever>
yep
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<clever>
[ 0.000000] arch_timer: cp15 timer(s) running at 1.00MHz (virt).
<clever>
dolphinana__: aha, this thinks the clock is running at 1mhz, which is an option, but considering how fast things are ticking, its probably 19.2mhz
<clever>
dolphinana__: uhh, oops, i left a backdoor in the default image, lol
<clever>
if you can call that a backdoor
<dolphinana__>
your public key for?
<clever>
my ssh public key
<dolphinana__>
ah, I see
<clever>
it let me into the pi2, without any fuss
<clever>
the same image i told you to try using yesterday
<dolphinana__>
uh oh... o.o
<clever>
yeah
<bonda_000>
decided I'll go for minix 1
<bonda_000>
that one is without virtual memory
<bonda_000>
circa 1996
<clever>
dolphinana__: now that the basics are working, i can focus on new things, like hdmi or isp, and trying to get the new disk image to build, without the pubkey this time!
<bonda_000>
nevermind 1987
<dolphinana__>
clever, nice!
<dolphinana__>
wait, what does isp stand for?
<clever>
image sensor pipeline?
<clever>
its part of the camera stuff bonda_000 wants working
<bonda_000>
tbh
<dolphinana__>
ah, I see
<bonda_000>
I want to not ruin my raspberry and other associated hardware
<bonda_000>
with the way things are I've been doing too many hard resets. and ideally this Pi should live to the moment I actually get to program with the isp block
<bonda_000>
porting a small os so I dont have to pull some cord every time I need/want to change the program is like a necessity at this moment
<clever>
or just solder some wires to the RUN header
<bonda_000>
don't want to ruin anything that's my only computer
<bonda_000>
Already reversed polarity 2 weeks ago and fried an MSP432
<bonda_000>
I know there are these small solder dots at the back side of the board
<bonda_000>
oh wait
<bonda_000>
yeah what is this
<bonda_000>
the RUN thing?
<clever>
yes
<bonda_000>
I see it next to the USB
<bonda_000>
if I short these it powers off?
<clever>
it will hard reset it, without turning the power off
<bonda_000>
shorting those two?
<clever>
yeah
<bonda_000>
and if I keep them shorted then?
<clever>
i soldered a 0.1" header pins onto, and then plugged in a reset switch from an old PC case
<clever>
if you keep it shorted, it stays in reset
<bonda_000>
u still here clever?
<clever>
bonda_000: sorta, but busy now
<bonda_000>
do you think it's a sound idea to put a compressed OS into a bootcode together with init sequence. it would init the hardware then decompress the OS and run from there
<clever>
bootcode.bin is limited to 128kb
<bonda_000>
thats like smaller than the floppy disk?
<clever>
yes
<bonda_000>
once you are done
<bonda_000>
can you explain what is the arithmetic that you are doing
<bonda_000>
take the lowest 3 bits of an interrupt number and multiply by 4? and shift 15 by that multiplication result?
<bonda_000>
that's gonna be more than 32
<clever>
intno has a max of 7, 7<<2 is 28
<clever>
so that becomes 0xf << 28
<clever>
which sets bits 28/29/30/31
<bonda_000>
assert(vector < 64);
<bonda_000>
set_interrupt(vector, true, 0);
<bonda_000>
that looks like a max of 64
<clever>
or rather, `intno&7` has a max of 7
<bonda_000>
63*
<bonda_000>
oh
<bonda_000>
so all that does is that interrupt is masked, i.e. won't interrupt the core
<bonda_000>
so
<bonda_000>
if bootcode runs from L2 cache
<bonda_000>
which has alias '8'
<bonda_000>
and L2 cache is 128KB in size
<bonda_000>
what addresses is it mapped to?
<bonda_000>
so in that mode I can access addresses from 80000000 to 80020000?
<bonda_000>
and If I try anything above 80020000 I will get an exception?
<bonda_000>
it's weird because in ARM I had 1GB of ram, from 0x0 to 3FFFFFFF, and cache there, 64KB in size both instructions and data, could hold any address, and was more of like a table of recently look-upped memory for quicker access
<bonda_000>
I don't particularly understand what it means to "load" L2 cache with bootcode
<bonda_000>
or it's just, once you enable L2 cache, any reads/writes with alias '8' become legitimate? or only in the 80000000 - 8002000 range?
<clever>
bonda_000: any r/w to the whole 1gig range at the 8 alias can be cached in the L2 cache
<clever>
the boot rom will use vector writes to zero out 128kb, starting at 0x8000_0000
<clever>
and because the write does a whole cache line, the L2 cache just accepts it
<clever>
if you try to write outside that 128kb range, the cache will need to evict something to dram
<clever>
and oh, the dram isnt online, something goes horribly wrong :P
<clever>
if you try to read outside that 128kb range, cache miss, go to read dram, oh, its offline, something goes horribly wrong :P
<bonda_000>
so at the bring up cache is aware it's empty
<bonda_000>
?
<clever>
out of reset, the L2 cache is entirely empty
<clever>
and the boot rom will initialize a 128kb chunk of the cache to all zeros
<clever>
so you can then use it as normal ram, for the most part
<bonda_000>
so its like four physical devices mapped onto one physical memory range at different stages
<clever>
yeah
<bonda_000>
bootrom, sram, l2 cache, then sdram
<clever>
at offset 4c8 in the pi3 rom, is init_l2cache()
<clever>
it first writes a 0 into an `uint32_t[8*16]` in the vector registers
<clever>
512 bytes
<clever>
it then loops 256 times, writing 512 bytes to the 0 alias
<clever>
for a total of 128kb
<bonda_000>
i see it
<bonda_000>
it doesnt show me any C code as it doesn't undestand vector instruction
<clever>
yep
<bonda_000>
maybe make these into separate functions?
<clever>
vector opcodes rarely come up
<bonda_000>
I read in your interrupts code
<bonda_000>
/ it will then push pc and sr onto the new stack
<bonda_000>
/ when an exception or interrupt occurs, the cpu will make sp into an alias pointing to r28
<bonda_000>
/ it will then push pc and sr onto the new stack
<clever>
yeah, thats the supervisor vs user stacks
<clever>
its a security thing
<bonda_000>
that's an equivalent of ARM srsdb sp!, #MODE?
<bonda_000>
although VPU does it for you?
<clever>
somewhat, yeah
<clever>
bbl
<bonda_000>
from the manual
<bonda_000>
On an interrupt, the interrupt mode is entered (r25 is mapped to r28), then pc and then sr are pushed onto the stack.
<bonda_000>
(hermanhermitage)
<bonda_000>
pushed on the stack automatically? in ARM they often say this but what they actually mean you have to do it manually