00:00
<
dolphinana >
not the whole thing...
00:01
<
dolphinana >
sorry for taking so long, I'm quite excited because I've wanted to do this for so long and now I'm getting closer ^^
00:03
<
clever >
[ 0.000000] INITRD: 0x03100000+0x00f49000 is not a memory region - disabling initrd
00:03
<
clever >
dolphinana: anything after this one?
00:03
<
dolphinana >
clever: no...
00:04
<
dolphinana >
and sadly, I really should be going to sleep at this point...
00:04
<
clever >
oh, remove quiet from the cmdline
00:04
<
clever >
that makes it ... quiet!
00:04
<
dolphinana >
hmm...
00:04
<
dolphinana >
maybe just one more testing...
00:05
<
dolphinana >
I'll remove quiet...
00:05
<
dolphinana >
I could've done that sooner, but somehow my mind managed to ignore that...
00:05
<
dolphinana >
I guess I got really distracted...
00:08
<
dolphinana >
ooooh, now I can see the further boot process!
00:08
<
clever >
pastebin once more!
00:13
<
clever >
looks like 64mb in the first memory range
00:13
<
dolphinana >
I really have to sleep now
00:14
<
clever >
and 400mb in the 2nd range
00:14
<
dolphinana >
good night clever ^^
00:15
<
dolphinana >
see you tomorrow
00:15
<
clever >
dolphinana: ah, your initrd is too big, it doesnt fit within the pre-allocated area
00:15
<
clever >
its too big by ~300kb, lol
00:16
dolphinana has quit [Quit: Leaving]
01:11
inara has quit [Quit: Leaving]
01:14
inara has joined ##raspberrypi-internals
02:46
jcea has quit [Ping timeout: 260 seconds]
02:47
jcea has joined ##raspberrypi-internals
02:51
jcea has quit [Ping timeout: 268 seconds]
03:14
Bitweasil has joined ##raspberrypi-internals
04:48
wael has quit [Ping timeout: 268 seconds]
05:59
wael has joined ##raspberrypi-internals
07:54
<
f_ridge >
<system/D> x2x6_ joins
08:53
bonda_000 has joined ##raspberrypi-internals
09:58
f_ has joined ##raspberrypi-internals
10:00
jcea has joined ##raspberrypi-internals
10:18
Stromeko has quit [Ping timeout: 245 seconds]
10:23
Stromeko has joined ##raspberrypi-internals
11:00
<
bonda_000 >
clever: hello
11:00
<
bonda_000 >
do you know what frequency is the core at if you boot with usb/ethernet option?
12:27
jcea has quit [Ping timeout: 268 seconds]
13:34
bonda_000 has quit [Read error: Connection reset by peer]
13:35
bonda_000 has joined ##raspberrypi-internals
13:42
<
clever >
bonda_000: if you boot from sd, the rom leaves things at the default, clocked directly by the crystal
13:42
<
clever >
bonda_000: but if you boot from usb/network, the rom increases the vpu clock
13:42
<
clever >
this is another reason to just forget that the mini-uart even exists
13:44
<
clever >
lines 44-46 will set gpio14 to pl011 mode
13:44
<
clever >
46-58 sets the PL011 reference clock to the crystal, so it doesnt matter how it booted
13:44
<
clever >
and the #if changes the divisor, so both pi3 and pi4 get the same clock
13:45
<
clever >
59-77 then configures the PL011 for 115200 baud tx only, and prints a single character
14:31
bonda_000 has quit [Ping timeout: 240 seconds]
14:34
bonda_000 has joined ##raspberrypi-internals
14:50
f_ has joined ##raspberrypi-internals
14:53
<
bonda_000 >
do we have a supervisor call instruction or we just bitset sr,29?
14:54
<
bonda_000 >
i see there's a "user" instruction but no "supervisor" one that I was able to find
14:54
<
clever >
bonda_000: no supervisor functions available in LK
14:54
<
bonda_000 >
I mean, in assembly
14:54
<
clever >
i think the only way to switch from user mode to supervisor mode, is with an exception
14:55
<
clever >
> If the least significant bit of the table entry is set, then the supervisor bit (bit 29) or sr is set when the handler is executed
14:55
<
bonda_000 >
yeah that's what I'm doing right now, context switch. kernel needs to know whether we were interrupted in user mode or supervisor mode
14:55
<
clever >
all opcodes must be 16bit aligned, so any valid address for code must have bit0 set to a 0
14:55
<
clever >
the exception table cheats a bit, if bit0 must be a 0, just assume its always a 0
14:56
<
clever >
and then reuse the actual bit0, as a flag
14:56
<
bonda_000 >
that's what I dont want to happen I think, that bit enabled
14:56
<
clever >
and then you have slots 32-63, the swi handlers
14:56
<
clever >
so you can rig up for `swi 0` to run the 32nd slot in that table
14:56
<
clever >
and then it handles that, it switches to supervisor mode
14:56
<
bonda_000 >
so, basically
14:57
<
bonda_000 >
supervisor mode = we are in kernel
14:57
<
bonda_000 >
user mode = we are elsewhere
14:57
<
bonda_000 >
so upon interrupt entry we need to know do we need a context switch
14:57
<
clever >
you can also find this in the decompile, one min
14:57
<
bonda_000 >
if we are in supervisor, we got interrupted while we were doing something in kernel
14:58
<
bonda_000 >
so if we enable that bit on the irq table we won't be able to know
14:58
<
bonda_000 >
where we came from
14:58
<
clever >
i believe it pushes the old sr to the stack before switching things
14:58
<
clever >
so the `rti` opcode can restore sr to its previous state
14:59
<
clever >
there it is, in the unstripped binary, rtos_secure_function_call
14:59
<
bonda_000 >
rts is pop {lr} right?
14:59
<
clever >
there is no rts opcode in vpu
15:00
<
clever >
rtos_secure_function_call will disable interrupts, and issue an swi 0, then restore interrupt state
15:01
<
clever >
rtos_secure_function_register, will take a function pointer, and call secure function 0, to get the index of that secure function in a list of approved functions
15:01
<
clever >
in the .secfns section, is the whitelist of approved functions
15:02
<
clever >
everything there can be called via `swi 0` when on the official firmware
15:04
<
clever >
and rtos_init_security is also a fun one
15:04
<
clever >
it looks to be configuring the dram controller, for secure access
15:05
<
bonda_000 >
its all over the place
15:06
<
clever >
not familiar with that exact function
15:06
<
bonda_000 >
rti less often but I was wondering what's the difference between the two
15:06
<
bonda_000 >
rts seems to be just mov pc, lr
15:06
<
clever >
rti is for interrupts/exceptions only
15:06
<
clever >
i forgot about rts, will need to dig into that on
15:07
<
clever >
yeah, rts is exactly what you said, and i'm using it in my uart init i linked earlier, lol
15:07
<
bonda_000 >
I think r29 is like fp register of ARM
15:07
<
bonda_000 >
pointer to a structure describing current thread for a given core
15:07
<
clever >
in your decompile, skip over to _tx_vectors, and change the type to `void*[128]`
15:08
<
clever >
and it will be more clear what it is
15:08
<
bonda_000 >
which section is it
15:08
<
clever >
and now rtos_init_security, is just setting bit0 to 1
15:08
<
clever >
its in .isr_vectors
15:09
<
clever >
and rtos_common_leave_secure_mode, just pushes lr and 0x0 to the stack, then does rti
15:09
<
clever >
so it winds up "restoring" lr into pc, and 0 into sr
15:09
<
bonda_000 >
nothing changed
15:09
<
bonda_000 >
they were uint32_t *
15:09
<
clever >
ah, on mine it was a byte array
15:10
<
bonda_000 >
its 32 of _tx_exception_unknown, then all the swi's are zeroed out, the majority of peripheral irqs are going to the _tx_interrupt_shell
15:11
<
bonda_000 >
_tx_timer_interrupt and two _tx_smp_interrupt are exception for the lack of better word
15:11
<
clever >
but 64 (INTERRUPT_TIMER0) and 78/79 (INTERRUPT_MULTICORESYNC2) are going somewhere special
15:12
<
clever >
124/INTERRUPT_CPG is also referenced
15:12
<
bonda_000 >
SMP interrupt is the thread controller I guess?
15:13
<
clever >
inter-core messaging
15:13
<
clever >
so when core0 wants core1 to do something, it uses the multicore sync block to fire an irq on the neighbor
15:15
<
bonda_000 >
that's probably not very important in a kernel
15:16
<
clever >
it is when you have an SMP kernel
15:16
<
bonda_000 >
since both cores just talk to their boss "kernel"
15:16
<
clever >
but how does the kernel talk to itself?
15:16
<
clever >
the 2 cores need some channel between them
15:16
<
bonda_000 >
core is just running a thread
15:17
<
bonda_000 >
what does it have to do with what program the other core is running
15:17
<
bonda_000 >
it can send an ipc call through the kernel
15:17
<
clever >
what if core1 is in the idle loop, and core0 schedules more when for core1?
15:17
<
clever >
how will core1 learn that an ipc call is pending?
15:18
<
bonda_000 >
core0 isnt scheduling anything kernel does all the scheduling
15:18
<
bonda_000 >
cores are just workers on whatever tasks kernel gives them
15:18
<
clever >
and how does the kernel on core0 talk to the kernel on core1?
15:19
<
bonda_000 >
there is one kernel
15:19
<
bonda_000 >
for both cores
15:20
<
clever >
yeah, but the kernel on core1 needs an inter-core interrupt, to learn abotu changes occuring on core0
15:20
<
clever >
thats what the smp irq is
15:22
<
bonda_000 >
yeah you are right
15:22
<
bonda_000 >
there is one main but each core sits at its own place in it
15:26
<
bonda_000 >
oh you mean that
15:26
<
bonda_000 >
for example
15:27
<
bonda_000 >
we don't want to wait for core1 to use all of its' time slice
15:27
<
bonda_000 >
and want it to stop executing that program immediately
15:27
<
bonda_000 >
that could be the inter-core interrupt
15:28
<
bonda_000 >
but then
15:28
<
bonda_000 >
that would be a kill()
15:29
<
clever >
that too, if you want to halt something running on the other core
15:29
<
bonda_000 >
that will talk not the other core, but to kernel, to remove that other program from the list of active programs
15:29
<
bonda_000 >
so it goes
15:29
<
bonda_000 >
core0 core1
15:29
<
bonda_000 >
but you say its
15:30
<
bonda_000 >
core0 ------ core 1
15:31
<
bonda_000 >
kernel is a software construct and cores are hardware concepts
15:32
<
bonda_000 >
there shouldn't be any thread-bound or core-bound programs unless you implement affinity
15:33
<
clever >
for the official firmware, threads are assigned to a core on creation and will never migrate
15:33
<
bonda_000 >
I may probably stumble upon the use case for that as I dig deeper into it
15:38
<
bonda_000 >
I think ideally one core shouldn't be aware that there are other cores
15:38
<
bonda_000 >
that's the spirit of UNIX like operating systems from my understanding
15:38
<
bonda_000 >
all the resources it asks the kernel for
15:40
<
bonda_000 >
possible, from it's copy or slot in the kernel but even that it doesn't know the internal organization of the kernel
16:04
<
bonda_000 >
so is lea the PC relative load like in ARM we would do ldr r0,=LABEL?
16:04
<
clever >
but arm cheats, when you do that, it will insert a 32bit addr nearby
16:04
<
clever >
and then do a pc-relative load of the 32bit value
16:05
<
clever >
vpu doesnt cheat, and just does a direct pc-relative `r0 = pc + offset`
16:05
<
bonda_000 >
yeah ARM can't reach very far with that code
16:05
<
bonda_000 >
they do say its a pseudo-instruction
16:06
<
bonda_000 >
be back soon
16:31
bonda_000 has quit [Ping timeout: 260 seconds]
17:21
dolphinana has joined ##raspberrypi-internals
17:31
bonda_000 has joined ##raspberrypi-internals
19:07
<
dolphinana >
hi! o/
19:09
<
clever >
dolphinana: afternoon!
19:09
<
dolphinana >
hi clever! ^^
19:09
<
clever >
dolphinana: i noticed 2 things with your last pastebin
19:09
<
clever >
first, your initrd is ~300kb too big, and its going over a limit in the bootloader
19:09
<
clever >
second, linux switches from earlycon to normal console, and logging stops, not sure why it isnt on the uart
19:09
<
clever >
do you have a tv hooked up to the ntsc output?
19:16
<
dolphinana >
clever, I'll be right back, just wait...
19:16
<
dolphinana >
(I'm doing something else right now.)
19:25
<
bonda_000 >
Any idea what is tectrl.h?
19:25
<
bonda_000 >
at address 0x7e20e000
19:26
<
bonda_000 >
looking for A2W, APHY,DPHY in the brcm header folder
19:26
<
bonda_000 >
looks like some timer
19:27
<
bonda_000 >
also this stuff from VideoCore programming manual would be very cool to know how to use:
19:27
<
bonda_000 >
p11 [B0] is PRTIMCTL for Closely Coupled Timer Control (core and sleep timers).
19:27
<
bonda_000 >
p12 [B0] is PRCORTIM for Core Timer Result.
19:27
<
bonda_000 >
p13 is PRSLPTIM for Sleep Timer Result.
19:29
<
bonda_000 >
nwm I got A2W, APHY_CSR_BASE, DPHY_CSR_BASE
19:30
<
bonda_000 >
is that USB stuff?
19:33
<
clever >
bonda_000: dont think any of that has to do with usb
19:33
<
clever >
usb is fairly self-contained in the dwc2 area
19:34
<
bonda_000 >
CD_BASE at 0x1820b000 which is kind of weird for a peripheral
19:35
<
bonda_000 >
and Thread controller at 18e00000 if I understand correctly
19:45
f_ has quit [Ping timeout: 260 seconds]
19:49
<
bonda_000 >
oh found it
19:49
<
bonda_000 >
its the other two sd_ files
19:51
<
bonda_000 >
what does it mean in human language?
19:51
<
bonda_000 >
"sd addr front" and "sd dq front"
19:51
<
clever >
that sounds like the dram controller
19:52
<
clever >
ive not made sense of it much either
19:57
<
dolphinana >
hey clever, is ARM really the second-class citizen on Raspberry Pi and that the VC4 VPU is the one that has direct hardware control?
19:58
<
clever >
dolphinana: pretty much, the VPU is just giving the arm permission to access some hw blocks
19:58
<
clever >
and ive not found all of the enable flags, so the arm cant do basic things like 2d accel
19:58
<
dolphinana >
mhm... exactly what I was thinking
20:00
<
clever >
dolphinana: related, there is an entire undocumented MMU...
20:01
<
clever >
dolphinana: this MMU can map ~16mb chunks of the arm's address space, into the VPU's address space
20:01
<
clever >
so its basically giving the arm permission to access a 16mb chunk of ram
20:02
<
clever >
so i could just limit the arm core to 64mb of ram, and it will just never be able to access anything more
20:03
<
clever >
this is also what gives the ARM permision to use MMIO
20:07
<
clever >
dolphinana: do you know about how MMIO is at 0x2000_0000 on a pi1, and 0x3f00_0000 on a pi2?
20:08
<
clever >
lines 373/374 of arm.c set it up, so its at both addresses, on the entire pi0-pi3 family!, because why not? :D
20:14
<
clever >
this allows me to boot a pi1 with the mmio at 3f
20:14
<
clever >
and a pi2 with the mmio at 20
20:22
<
dolphinana >
mhm...
20:23
<
dolphinana >
I have a little trouble understanding this and I'm too sleepy now... I think I'll take a nap.
20:23
bonda_000 has quit [Ping timeout: 268 seconds]
20:24
bonda_000 has joined ##raspberrypi-internals
20:26
<
bonda_000 >
vpu has an undocumented mmu?
20:26
<
bonda_000 >
arm mmu is very well documented
20:27
<
clever >
bonda_000: this is an extra mmu, between the arm mmu and ram
20:27
<
clever >
so what the arm thinks is physical, isnt
20:28
<
bonda_000 >
what they are hiding is the multimedia block
20:28
<
bonda_000 >
:dolphinana
20:28
<
bonda_000 >
try to look up the h264 video encoding, say you wanted to make a cartoon in Paint and stick 24 frames into 1s of video
20:29
<
bonda_000 >
you won't find any, proprietary standard
20:29
<
bonda_000 >
at least for free
20:46
<
dolphinana >
I'll be taking a nap now...
20:46
<
dolphinana >
see y'all ^^
22:04
waveform has quit [Quit: Leaving]
22:17
waveform has joined ##raspberrypi-internals
23:04
Bitweasil- has joined ##raspberrypi-internals
23:06
robink_ has joined ##raspberrypi-internals
23:07
robink has quit [Quit: No Ping reply in 180 seconds.]