azonenberg changed the topic of ##openfpga to: Open source tools for FPGAs, CPLDs, etc. Silicon RE, bitfile RE, synthesis, place-and-route, and JTAG are all on topic. Channel logs: https://libera.irclog.whitequark.org/~h~openfpga
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<pie_>
how absurd would it be conceptually to backdoor an fpga implementation of something with malicious place&route?
<pie_>
i.e. the RTL is clean but the place and route isnt
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<jn>
pie_: typical proprietary FPGA toolchains are already big (several gigabytes) and slow (several seconds of startup delay before they do anything useful), and P&R runs pretty long anyway, so in that regard there's a good opportunity to go unnoticed
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