azonenberg changed the topic of ##openfpga to: Open source tools for FPGAs, CPLDs, etc. Silicon RE, bitfile RE, synthesis, place-and-route, and JTAG are all on topic. Channel logs: https://libera.irclog.whitequark.org/~h~openfpga
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<Peanut>
Does anyone have experience with the EHXPLLL in the ECP5? I'm looking for a way to calculate the CPHASE/FPHASE (coarse/fine phase adjustment) of an output. Also I'm interested in how to tune the loop parameters and loop bandwidth.