ChanServ changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/
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<stephe> agg: all the signals seem fine, cdone goes high to confirm it’s programmed but then I don’t get any response from it, wondering if I need to do anything else to get it to start up after programming
<stephe> Also is it possible to program the nvcm as spi slave if I send the nvcm file as bitstream?
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<agg> stephe: hmm, if cdone is going high i would expect the bitstream to be operational - i guess you've read the config doc so are doing the reset with cs low, 8 dummy clocks with cs high, assert cs, send bitstream, deassert cs, 128 more dummy clocks dance... are you sure the bitstream is correct?
<agg> I haven't tried nvcm programming
<tnt> stephe: make sure you're not skipping some of the dummy cycles and they're sent with th eother signals as they should. Else the IOs might not get released to the userbitstream.
<stephe> Hmm I’ll check but I think I send them thanks guys
<stephe> What dev boards do you guys prefer?
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<stephe> Are the gw1n chips any good for learning?
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<stephe> Dunno if o should stick with ice40 for learning or something else
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<kraiskil> stephe, ice40 sounds like a good idea :)
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<tnt> ice40 is great for learning. The gw1n open toolchain is not at the same level of maturity.
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