ChanServ changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/
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<dcarr> Curious if anyone has done thinking/work on adding external IO timing constraints to nextpnr?
<dcarr> (something along the lines of set_input_delay, set_output_delay in SDC files)
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<tnt> and ... he waited a whole 14 min for an answer ...
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<uis> How chipdb compression works?
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<dcarr> tnt: Sorry, got booted off last night and didn't realize it.  Glad to hear about anyone's present thinking (if any) about IO timing constraints in nextpnr.
<tnt> I'm not sure about ECP5, but at least for ice40 those timing info haven't been extracted, so the first step would be to do that.
<dcarr> That makes sense.  I was digging into the ICE40 timing data and it looked to me like the "timing netlist" ended short of the actual IO pad.
<dcarr> I haven
<dcarr> *haven't messed with the fuzzer previously, but it seems like it could be extended to capture that
<dcarr> tnt: Recently watched your stream from April 2020 on ICE40 IO timing.  It was really well done, thanks!
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<tnt> Tx.
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