ChanServ changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/
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<bosje> Hi, any suggestions for getting around this error:
<bosje> `ERROR: Unsupported expression on dynamic range select on signal \a`
<bosje> ```verilog
<bosje> generate
<bosje>   for (i = 0; i < 10; i = i + 1) begin
<bosje>     MyModule u_temp (.x(a[i][0], .y(~a[i][1]));
<bosje>   end
<bosje> endgenerate
<bosje> ```
<bosje> Guess you can't access specific bits in a for generate loop?
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<bosje> anyone know how to turn off synthesis optimizations?
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<lofty> bosje: which synth script?
<bosje> custom one:
<bosje> ```
<bosje> synth -top $top
<bosje> dfflibmap -liberty $lib_lib
<bosje> abc -liberty $lib_lib
<bosje> ```
<lofty> bosje: add -fast to abc
<bosje> what will that do?
<lofty> turn off synthesis optimizations
<bosje> awesome, thanks
<lofty> -fast is basically "map as-is"
<bosje> will it still do SAT reduction?
<lofty> no, but it will structual hash
<lofty> *structural hash
<bosje> Let me experiment a bit, I found that sometimes the optimizations reveal other bugs
<bosje> i have to basically handcraft the netlist anyway for what I am trying to do
<lofty> structural hashing is unlikely to cause that
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