Tartarus changed the topic of #u-boot to: SOURCE MOVED TO https://source.denx.de/u-boot/u-boot.git / U-Boot v2023.10, v2024.01-rc1 are OUT / Merge Window is CLOSED, next branch is CLOSED / Release v2024.01 is scheduled for 08 January 2024 / Channel archives at https://libera.irclog.whitequark.org/u-boot
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<sjg1> marex: Somehow my email has stopped coming from all mailing lists. I suppose it is a holiday
<sjg1> Forty-Bot: yes I hope so
<darkxst> v2024.01-rc1 fails to boot on my board. https://pastebin.com/qUrEVDfx
<darkxst> seems to fail reading pmugrf, however this works the first time in TPL
<darkxst> board is based on rv1126 and using a lightly patched copy of edgebable ai neu2
<darkxst> 2023.10 works good
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<marex> sjg1: heh
<marex> darkxst: can you try git bisect ?
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<darkxst> marex: sure, will start one now
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<marex> thanks
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<darkxst> git bisect came back with this as the bad commit
<darkxst> 2ce06f56 - buildman: Start the clock when the build starts
<darkxst> maybe thats not right
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<marex> nope
<marex> git bisect start v2024.01-rc1 v2023.10
<marex> and then build, test, git bisect good/bad
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<darkxst> I took a wrong turn right near the end. its actually this commit
<darkxst> 9e64428 dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation
<darkxst> that was the command I used btw
<marex> darkxst: and if you revert only that patch on top of u-boot/master, it all works again ?
<marex> Kwiboo: ^
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<darkxst> let me try
<darkxst> yes master with just that patch reverted boots fine
<marex> darkxst: check your DT (likely the -u-boot.dtsi really), and see if there are any bootph-pre-sram or bootph-pre-ram , you might need to replace some of those with bootph-all or bootph-some-ram
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<darkxst> marex, most nodes in rv1126-u-boot.dtsi are marked bootph-pre-ram. Should I change all of them?
<marex> darkxst: ideally as needed, but the heavy handed approach might be a good starting point
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<Kwiboo> darkxst: you probably need to use bootph-all on the pmu and grf related nodes
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<darkxst> if bootph-pre-ram now means spl only they are probably all wrong
<darkxst> this boots now with this https://pastebin.com/zJWAs0z3
<darkxst> but not sure about the gpio nodes, if they need some or all?
<darkxst> if that looks right I will send a patch to mailing list
<apalos> sjg1: https://patchwork.ozlabs.org/project/uboot/patch/20230912213504.65513-2-seanedmond@linux.microsoft.com/ is delegated to me, but I only had comments on a single patch from taht series
<apalos> You have reviewed the rest, so will you send it to Tom, or shall I?
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<xypron> I am on a business trip. It is fine if you pick it up.
<xypron> I will be back in two weeks.
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<Kwiboo> darkxst: gpio nodes is needed in spl/bootph-pre-ram on some rockchip boards, they are probably not needed in u-boot proper pre-reloc/bootph-some-ram phase, typically only dmc/grf/pmu related nodes is needed during u-boot proper pre-reloc phase (they are usually needed in all phases)
<Kwiboo> gpio nodes is needed in spl/bootph-pre-ram when board require use of gpio controlled regulator or card detect for functional mmc/spi in spl on rockchip platform
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<darkxst> Kwiboo, ok thanks for the clarification. yeh both those are on gpios.
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<Clamor> Tartarus: may you ping tagr if you haven't? Patches are getting outdated quicker than he does smth.
<Tartarus> Clamor: I did email him late last week
<Clamor> Thanks!
<Tartarus> Clamor: please remind me again like Thurs/Friday
<Clamor> Sure, will do.
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<iprusov> Forty-Bot: Hello! Sorry for the ping, but could you please take a look at this series: https://patchwork.ozlabs.org/project/uboot/list/?series=378025 ? It's been on a list for quite a while, so wanted to make sure it wasn't missed
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<hsv> Hi, unsure if this really is a u-boot issue, but i'm stuck...
* hsv screwed up and erased the spi flash via u-boot on a camera module (goke SoC running openipc), and now it just emits strings of 25 spaces and a newline char once per second from the uart.
<hsv> Is that something that u-boot does?
<hsv> Even after reprogramming the spi flash chip off-board with a full image, including u-boot, it has this same behaviour.
<hsv> With the terminal in hex mode i see [20][20][20][20][20][20][20][20][20][20][20][20][20][20][20][20][20][20][20][20][20][20][20][20][20][0a] repeated every second.
<hsv> It was all good until i did 'sf erase' and forgot to follow this with 'sf write ...' - https://paste.debian.net/plainh/bda6da47
<marex> hsv: nope
<marex> hsv: could it be the SoC bootloader ?
<marex> hsv: did you read the reprogrammed chip back and verify it was written correctly ?
<marex> hsv: is it soldered correctly back in ?
<hsv> i desoldered the chip from the board to reprogram it, and yes it verifies against teh full image.
<hsv> The problem started after 'sf erase ...' and 'reset' at the u-boot console.
<marex> hsv: obv check, your UART is correctly configured ? better double check
<marex> 20 spaces and newline is not something which would come out of mainline u-boot
<marex> I can imagine dots if it was doing something, like tftp
<marex> or maybe it is hash during tftp download
<marex> but spaces are unusual
<hsv> Do you know is it usual for the SoC to have its own pre-bootloader, before u-boot starts?
<marex> hsv: if it boots from complex storage like SPI NOR, there has to be something
<marex> hsv: nowadays yeah, most SoCs have bootrom
<marex> which soc is this ?
<hsv> It is Goke gk7205v200 based ip camera module.
<marex> hum, never heard of that one
<hsv> This is last sensible output - https://paste.debian.net/plainh/bda6da47
<hsv> It was meant to do 'sf write 0x42000000 0x0 0x1000000' before reset.
<marex> isnt sf lock LOCKING the memory (contrary to sf unlock) ?
<marex> seems like this is some downstream u-boot fork ?
<hsv> Possibly, the project is openipc.
<hsv> No irc channel unfortunately, only Telegram and mostly in Russian.
<hsv> ... though i may try there if this goes nowhere.
<marex> U-Boot 2016.11 fork , ugh
<marex> hsv: did you recheck your uart yet ?
<marex> just to be sure it isnt confused in some way and you're not getting bogus data that way, while the firmware might just be working
<hsv> Other than attach a logic analyser i'm confident the uart is as it should be.
<hsv> So i assume the SoC is stuck in a boot loop emitting those spaces at startup.
<hsv> maybe 'sf erase ...' trashed the spi flash chip?
<marex> hsv: didnt you write you did read it back and compared the content ?
<hsv> With the chip removed i used 'flashrom' and a raspberry pi to flash a full image and verify it.
<hsv> ... then resoldered to the board, and still it emits the spaces.
<marex> hsv: verify means - read it back and compare it with the original file ?
<hsv> "full image" meaning a combined image with u-boot + rootfs.
<marex> hsv: is "full image" what you were trying to write into the SPI NOR using that uboot command too ?
<hsv> not exactly, 'flashrom' has verify option.
<marex> which does what ? :)
<hsv> yes the same combined image via u-boot, first load it to RAM, then erase flash, then copy RAN to flash (as i understand it).
<hsv> flashrom verify reads the chip and compares with a given file image.
<marex> *look
<marex> could it be this dismal attempt at driver does some weird byte swapping in the SPI NOR ?
<marex> oh, one more thing, SPI NOR may have non-volatile configuration bits , check those , maybe flashrom modified something ?
<marex> (see SPI NOR datasheet, look around CR registers)
<marex> maybe some quad or 4byte mode is now enabled/disabled by default
<hsv> ok, thanks that has been useful insight gained.
<hsv> i will try remount a known working chip (it's just a pain to solder each time).
<marex> hsv: can't you attach probes to the chip while it is soldered ?
<marex> hsv: it might just work, maybe you need to lift nCS
<hsv> possibly, yes... i have considerd it. if i could locate the processor reset tha would be an option too.
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