Tartarus changed the topic of #u-boot to: SOURCE MOVED TO https://source.denx.de/u-boot/u-boot.git / U-Boot v2022.01, v2022.04-rc2 are OUT / Merge Window is CLOSED / Release v2022.04 is scheduled for 4 April 2022 / http://www.denx.de/wiki/U-Boot / Channel archives at https://libera.irclog.whitequark.org/u-boot
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<xypron> Tartarus: Should we globally increase the CONFIG_SYS_MALLOC_F_LEN=0x400 default which is incompatible with DM? See all the deconfigs which individually set a value.
<Tartarus> xypron: Yes, we should probably also do something like default 0x4000 if DM
<Tartarus> But 0x400 is the most commonly used value still
<Tartarus> I see a bunch of imx8 also do 0x10000 now which means someone should probably have adjusted the default for them already, or explained why it's so large relative to sandbox
<xypron> Tartarus: I guess a small value was chosen because initially only the dcache is used as RAM?
<Tartarus> 0x400? Yes, we didn't used to need nearly so much space, a larger default for DM is fine
<Tartarus> But what it should be, is the question
<Tartarus> sjg1: you're on that thread too, can you please chime in?
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<Forty-Bot> Tartarus: imx uses a large value because of CCF
<Tartarus> Then we should adjust that default upwards I think
<marex> I think we should reduce the amount of clock registered by CCF in SPL
<marex> because the amount of clock registered there is effing nuts
<marex> there is a grotesque amount of wasted early malloc space only for the sake of clock driver instances which are unused anyway
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<kabel> rfried: hello ramon, do you know when approximately will you find some time to merge those u-boot-net refactors I sent last week? or will joe be doing that?
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<cambrian_invader> kabel: things move (relatively) slowly here; generally things get merged within a month or so once they have been reviewed
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<marex> kabel: we're in rc4, so whatever are not fixes goes in after 2022.04 is out
<marex> Tartarus: topic needs update, s@rc2@rc4@
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<Tartarus> ah right, thanks
Tartarus changed the topic of #u-boot to: SOURCE MOVED TO https://source.denx.de/u-boot/u-boot.git / U-Boot v2022.01, v2022.04-rc4 are OUT / Merge Window is CLOSED, next is OPEN / Release v2022.04 is scheduled for 4 April 2022 / http://www.denx.de/wiki/U-Boot / Channel archives at https://libera.irclog.whitequark.org/u-boot
<kabel> cambrian_invader: ok
<kabel> marex: I know that, I was thinking about next
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<qyx> hello folks, I am doing a new stm32mp1x based board config, prepared hopefully all what is needed
<qyx> I load SPL over SWD, the board then disconnects
<qyx> so I have put a few lines for toggling a single GPIO in a while (1) loop into board_early_init_f
<qyx> so the SPL was indeed run, it toggled the GPIO a few times and then it went dead, disconnecting from SWD
<qyx> any pointers? I checked if there is any watchdog being set but I couldn't find anything
<qyx> power rail looks stable
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<cambrian_invader> qyx: you can always try "bisecting" the boot process
<cambrian_invader> at the very least, see if you can get to when the debug uart is set up
<cambrian_invader> and try enabling that