azonenberg changed the topic of #scopehal to: libscopehal, libscopeprotocols, and glscopeclient development and testing | https://github.com/glscopeclient/scopehal-apps | Logs: https://libera.irclog.whitequark.org/scopehal
<azonenberg> Starting to assemble the AKL-AD4 prototype. First problem: board is too tiny for my current solder paste jig :p
<azonenberg> So i have to paste it the old fashioned way with scrap pcbs and tape
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<_whitenotifier-c> [starshipraider] azonenberg pushed 2 commits to master [+5/-0/±3] https://github.com/azonenberg/starshipraider/compare/2a0f5f5bd252...e93299fd79be
<_whitenotifier-c> [starshipraider] azonenberg e446832 - Initial version of AKL-PR1 compensation network board
<_whitenotifier-c> [starshipraider] azonenberg e93299f - Rev 0.2 of AKL-AD4
<_whitenotifier-c> [starshipraider] azonenberg pushed 1 commit to master [+0/-0/±6] https://github.com/azonenberg/starshipraider/compare/e93299fd79be...0b157097235d
<_whitenotifier-c> [starshipraider] azonenberg 0b15709 - Missing change from last commit
<azonenberg> welp, after spending way too much time debugging, i have a respin with four changes being ordered
<azonenberg> one is cosmetic, two are relatively minor DFM fixes
<azonenberg> and one killed the amplifier on this board :p
<azonenberg> good news: the respun board is going to cost me less than $3 at oshpark
<azonenberg> bad news: the amplifier is almost $50
<azonenberg> plus ~2 weeks of delay and the other parts, and a new stencil.
<azonenberg> and it's not even the $50 it's that i only had 5 of them
<azonenberg> so the next one better work well enoguh for me to at least get some waveforms out of it
<azonenberg> i ordered more but they're not coming until october at best
<monochroma> what killed the amp?
<azonenberg> monochroma: i connected the active-low power down strap to +2.5V
<azonenberg> except the amplifier's "ground" was at -2.5V for dual supply operation
<azonenberg> so it was effectively +5V
<azonenberg> and apparently despite it being designed for 5V single supply operation, input max on the powerdown pin is 2.1 - 3.3V logic high with a nominal 2.8V on die pullup
<azonenberg> sorry i meant, the logic level is
<azonenberg> absolute max is +3.6V
<azonenberg> with +5V on it, i apparently blew out the protection diode bad enough that the +2.5V supply rail was measuring like -1V
<azonenberg> and with the board off the +2.5V rail measured about 2 ohms to -2.5V
<azonenberg> i reworked the board and put the same chip back on it, but the internal pullup was fried and the chip was off with powerdown floating
<azonenberg> with powerdown hard pulled to ground (+2.5V vs chip ground) power consumption of the chip increased but output still flatlined no matter what i threw at the input
<GenTooMan> azonenberg, I suppose a nice big (slow?) input isolation resistor would not help much?
<azonenberg> GenTooMan: it's a bit late for any of that :p
<azonenberg> The chip is fried and i have a respin ordered
<GenTooMan> azonenberg, I am aware just the "FYI this might have helped" still may be good to put the isolation resistor in regardless. :D
<azonenberg> I usually use 0R resistors for straps
<azonenberg> i omitted them in this design as it's cost optimized
<azonenberg> had i used a 1K or something maybe the bug would not have been fatal to the chip
<azonenberg> s/cost optimized/size optimized/
<GenTooMan> I guess size issues will do it.
<azonenberg> yeah i mean i remember doing the initial layout of the -3.5V supply which uses a WLCSP buck-boost converter
<azonenberg> and thinking "why are these resistors so enormous?"
<azonenberg> they were 0402s
<azonenberg> the entire supply fits on the back side of a u.fl
<azonenberg> and i still wanted it to shrink
<azonenberg> the production rev of this board will likely use a HDI stackup with blind filled via-in-pad
<azonenberg> maybe buried vias as well
<azonenberg> shrink as many passives as i can from 0402 to 0201
<azonenberg> i think the ICs are already as small as they can get (UDFN and WLCSP)
<azonenberg> the connector footprint can definitely shrink a bunch, that's already on the todo
<GenTooMan> well it's unlikely using flip chip direct bonding will make it cost effective enough.
<GenTooMan> you aren't making 100k of these
<azonenberg> This is also an active differential probe though, targeting 6 GHz BW
<azonenberg> it's competing with commercial products with high 4 / low 5 digit price tags
<azonenberg> So it's worth using fairly extreme design rules and PCB techniques if they will make it better
<azonenberg> if it ends up costing $200 instead of $100 per unit in BOM/assembly, it's still a massive cost savings for the end user
<azonenberg> who cares if you end up saving $7800 instead of $7900 on the cost of the probe? Lol
<GenTooMan> just presenting possibilities as one person astutely said "all things are possible, just not practical" so in this case ascertaining what's practical is key I suppose.
<GenTooMan> integrated passives into the PCB might help ... FYI
<azonenberg> lol
<azonenberg> now *that* is expensive. realistically, wirebonding is probably not goign to happen
<azonenberg> mostly because i dont think it will actually help much
<azonenberg> WLCSP etc are already the size of the die
<azonenberg> and the QFNs are not much bigger
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