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<unlord>
courmisch: has anyone managed to boot a more modern kernel on the K230?
<courmisch>
unlord: I didn't give my image to anybody, so the trojan that I put in it cannot track anybody else's kernel version :)
<unlord>
courmisch: lol
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<courmisch>
palmer and drewfustini strike me as more likely people to make build newer kernels, but not giving any names (just IRC handles)
<unlord>
no one will ever know who palmer is
<courmisch>
poor you and him, getting business travel to LPC, and not having time to work on the K230
<drewfustini>
Unfortunately I've not tried anything with K230 yet, still trying to finish some projects on TH1520 upsteaming
<unlord>
courmisch: I drove 4h yesterday (to and from), I'm back home now
<courmisch>
make sure you don't steam it too much that it doesn't melt
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<courmisch>
and I bought an apartment literally next to the metro station, so I can commute in under 20 minutes and have more free time for RISC-V and other hobbies
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<courmisch>
unlord: I think you're asking for the cart before the horses. First, figure out how to boot on a proper /boot so you can actually change the kernel and u-boot
<courmisch>
but maybe real men just update their kernel directly on raw block device, I don't know
<bjdooks>
in my day we had to xmodem it down a serial port at 115200
<courmisch>
my first Linux had to be booted off a 3.5" floppy even though it was installed on the hard drive
<courmisch>
that was before I figured LOADLIN.EXE was a thing
<courmisch>
fun times, copying the vmlinuz to the DOS partition and updating CONFIG.SYS for every new kernel version
<courmisch>
but I diggress
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<courmisch>
unlord: I don't know. Probably people at Canaan or T-Head did manage
<courmisch>
unlord: what do you want newer kernel for? riscv_hwprobe?
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<courmisch>
where is VWSLL.VX when you need it
<unlord>
courmisch: exactly
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<unlord>
getauxval() supports 'V' but someone pointed said there was a way to check for integer but not floating-point vector support
<courmisch>
unlord: do you suddendly care about embedded subsets?
<unlord>
reading up on it, I definitely don't
<unlord>
Zve64x is not Zvl128b
<unlord>
yeah, this is a good point
<courmisch>
well, FFmpeg does support all 3 subsets (Zve32x, Zve64x, Zve32f), as well as Zvl32b and Zvl64b, in principles.
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<sorear>
courmisch: part of Zvbb
<sorear>
nominally a crypto extension :|
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<courmisch>
sorear: you mean widening shift left?
<sorear>
yes
<courmisch>
sigh, why ever
<sorear>
depending on the core you may get the same throughput with vwmul...
<courmisch>
FLAC decorrelate is going to be satisfied with 60% performance gains
<courmisch>
s/to be/to have to be/
<unlord>
courmisch: is FFmpeg going to have embedded code?
<courmisch>
I'm not sure what that means in your head
<unlord>
courmisch: is FFmpeg going to have code for embedded subsets of V?
<courmisch>
it already does
<courmisch>
every function is correctly tagged to a subset
<courmisch>
in practice, nobody uses that though
<sorear>
no support in hwprobe
<courmisch>
well, nobody uses FFmpeg on RVV hardware anyway
<unlord>
courmisch: we're talking about RVV optimizations right?
<courmisch>
sorear: yeah, but since it's for embedded, I suppose compile time check is good enough (and that is supported)
<unlord>
ahh
<sorear>
are there ffmpeg rvv macrobenchmarks? "X function is Y% faster" is one thing but "X end-user operation is Y% faster" would be neat to see
<courmisch>
at least GCC has predefs for each subset
<courmisch>
sorear: thanks for volunteering
<sorear>
no promises re. schedule
<courmisch>
that was a joke but *I* am *not* doing macrobenchmarks on a K230 and on my freetime
<sorear>
too slow?
<unlord>
what is a macrobenchmark?
<unlord>
like, scaling a video v the scale function?
<courmisch>
unlord: run an actual decoder, not just a DSP function
<unlord>
yah ok
<courmisch>
sorear: single core, little RAM, and I just can't be bothered as a hobbyist TBH
<unlord>
courmisch: I'm still fixing this gentoo img and I was going to run perf on dav1d :)
<sorear>
hopefully it has more than k210's 8MB
<courmisch>
Debian debootstrap worked without any work. I just had a little bit of trouble turning of hvc0 in systemd
<unlord>
512M
<courmisch>
off*
<unlord>
courmisch: every program I run from the prompt hangs
<unlord>
which makes me think the programs I rebuilt are not matching the hardware
<courmisch>
it should throw a SIGILL, not hang
<unlord>
how do I debug?
<courmisch>
well if gdb hangs, you're kinda screwed
<unlord>
I was going to restart with a fresh gentoo stage3 from upstream and make sure that owrks
<courmisch>
install Debian and try to chroot into Gentoo from there?
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<smaeul>
prabhakarlad: noncoherent_supported is __ro_after_init. the bug is that Andes errata processing should not happen at module load time
<courmisch>
I wish there was a vredsum.vx and I could just pass zero as the accumulator...
<courmisch>
it seems that whenever I have a use for sum, the scalar source is zero
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<dzaima[m]>
yeah, it's a weird operation. Scalable plus not being the thing to use for a loop (elementwise adds & a sum at the end is clearly better) makes a poor combo
<dzaima[m]>
I'd imagine it might also have extra latency from that on some impls, which is extra sad for the common case of zero
<sorear>
it would also be nice if the reductions matched other operations and had implementation-defined vstart rules, instead of mandating in the spec that vstart not be supported
<sorear>
at least for vf(w)redosum which has rather painful latency at SEW=16 LMUL=8
<courmisch>
as a user space dude, I pretend that vstart does not exist :)
<courmisch>
sorear: are you saying that it is faster to manually reduce from M=8 to M=1 before using the sum?
<courmisch>
(I mean, using three consecutive vector-adds)
<dzaima[m]>
can't do that if you want to do exactly vfredosum and not vfredusum
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<courmisch>
I'm not a compiler, I don't use vredosum :P
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<dzaima[m]>
an LMUL=8 vfredusum implementation can choose to internally reduce to LMUL=1 via 3 vfadd-s, but there's no guarantee it will
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<dzaima[m]>
camel-cdr's K230 results for vfredusum follow (time_of_lmul_1 + 6 * (lmul - 1)), i.e. some base cost that depends on the type, plus 6 cycles/register (whereas vfredosum has a cost of 3 cycles/_element_), so I believe a single LMUL=4 vfadd before vfredusum would be better on it. vfwredosum and vfwredusum are both the same and bad (4 cycles/element)
<courmisch>
I'm a bit wary of microoptimising too much for C908 only for other designs to end up with worse perfs
<dzaima[m]>
right
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<dzaima[m]>
I'd imagine you couldn't make it much worse by the manual LMUL=4-ification; the best hardware could really do is an equivalent of that itself, and at that high of an LMUL, the cost of a separate instruction probably doesn't matter much. Going to LMUL=2 or 1 would be more questionable, especially with the vtype changes
<courmisch>
it's not clear to me how expensive vsetvli would be, especially whilst changing VL
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<sorear>
courmisch: i'm saying interrupt latency is needlessly bad because vfredosum, and only vfredosum, can do 100+ cycles of work without any architectural resume mechanism
<dzaima[m]>
it could also just be aborted (only a single elements worth of in-progress data), but then you might run into forward progress issues or something
<courmisch>
sorear: yes that does not sound very good especially for real-time, but I don't care about those use cases atm :)
<courmisch>
and besides, I don't do redosum
<sorear>
(let's assume lmul=8 vlen=128 sew=16, so that's 64 dependent adds, which have 3-5 cycle latency on most designs... extremely large register file designs will have it worse, or you can cut it in half by not implementing Zvfh, or ignoring forward progress)
<courmisch>
even the spec says that redosum is for compilers who can't violate IEEE rounding rules
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<ConorDooley>
Do we know the set of CPUs that have the broken underflow detection?
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<Esmil>
ConorDooley: i think it's at least all the "1st gen" t-head cores. c906 (Allwinner D1), c910 (TH1520) and c920 (SG2042)
<courmisch>
ConorDooley: is that another name for the missing FPU exception bug?
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<courmisch>
I can try on C908 if somebody has a small C test case
<ConorDooley>
Devils advocate - I should send a patch deleting FD from their devicetrees
<Esmil>
yeah, a bit down the thread someone agrees
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<sorear>
the IEEE rules for default handling of underflow exceptions are very confusing and I don't think C906 will be the last core to make that mistake
<courmisch>
there's no conformance test for that?
<ConorDooley>
Self certification baby
<sorear>
last I checked the risc-v first party conformance tests were not particularly complete, but that was several years ago
<courmisch>
WhatCouldPossiblyGoWrong
<sorear>
there's a bit of a moral hazard given the number of members that sell conformance tests
<courmisch>
stricter tests means more opportunities to upsell customers
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<ConorDooley>
courmisch: so you say the k230's FPU is okay?
<courmisch>
ConorDooley: teh big core FPU at least yes
<sorear>
2^192*4*5*2 possible combinations of inputs and rounding modes for the four FMA-type instructions alone...
<courmisch>
in my previous job, you'd see a single test box for six digits and you'd need several of them
<courmisch>
but 2^200 combos may be a little much
<sorear>
if you're testing the manufactured article you only need to know that every gate and wire functions as intended, not look for design flaws...
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