sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv | Backup if libera.chat and freenode fall over: irc.oftc.net
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<twb> Just curious, do they make pitop-quality (i.e. hobbyist garbage) rv64 laptops yet?
<twb> (I was digging through the proprietary software licenses for framework laptop and thinking "why is this even x86-64?")
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<cousteau> Hi!
<cousteau> Is RV64F (not D) a thing? It is, right? The specs seem to exclude RV64FC compressed instructions, but do mention 32FC, 32DC, and 64DC
<cousteau> I'm confused as to why C.FLW and others are exclusively for RV32FC and not RV64FC
<cousteau> Ooooh, never mind. It's because that instruction encoding is used for something different in RV64, not because it *can't* be used.
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<cousteau> Hey, not cool, they removed the GREV (generalized bit reverse) instruction from the B extension!
<xentrac> heh
<cousteau> Aaand someone else asked that already, and no it's not gone, just not standard yet. Well done, cousteau.
<xentrac> maybe it will survive!
<cousteau> Apparently it's part of the Zbp extension, and the pre-release only includes Zba Zbb Zbc
<twb> I'm glad you guys can remember all these catchy names
<xentrac> IMADZbaZmqZephyr
<xentrac> dunno, I'm just glad it's called B and not MBX Technology Ⓡ
<xentrac> does make it a bit hard to google
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