sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv | Backup if libera.chat and freenode fall over: irc.oftc.net
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<jrtc27> jimwilson: what's the best way to report incomplete documentation for unmatched devices?
<jrtc27> (in this case, that cltxpll's cfg0 register isn't documented, there's just a hole where the linux driver looks for it)
<jrtc27> ditto pcieaux's enable
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<jimwilson> jrtc27, no direct way to report doc bugs if you aren't a corporate customer, can try a sifive forum post, or maybe a freedom-u-sdk issue, or maybe mention it here if someone from SiFive is listening
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<jimwilson> I forwarded the questions to internal slack channel
<jrtc27> thanks
<jrtc27> what's weird is in the manual clktxclk is shown as hooked straight up to the hfpclkpll mux
<jrtc27> no separate pll in sight
<jrtc27> my guess is a PLL got added late in the design cycle to make them separate clocks and the docs were never updated
<jrtc27> seems weird to invent registers in and plls in the linux driver... ;)
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<jemarch> yo
<jemarch> just received my Unmatched :)
<jemarch> finally!
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<enthusi> jemarch: Yay. Mine is about to arrive today as well
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<Sos> dammit nezha board is weird to operate
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<enthusi> Sos: in what way?
<Sos> there's some extra steps to booting it seems
<Sos> haven't figured it out yet
<Sos> and the debug uart cable self destructed
<jemarch> :/
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<Sos> yeah i connecgted it to check out the boot sequence
<Sos> it spurted out a bunch of binary bullshit
<Sos> then said "ok"
<Sos> and nuked itself taking down my entire usb controller on the way out
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<enthusi> hm, sorry to hear that
<enthusi> unmatched arrived \o/
<enthusi> trying to set up ubuntu on sd/ssd
<enthusi> any quick hint how to read the temperature sensors
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<sirn> lm_sensors (sensors) should work
<enthusi> Ah, sure. Hoped for /proc things. thansk
<sirn> enthusi: do you have /sys/devices/platform/soc/10030000.i2c/i2c-0/0-004c/hwmon/hwmon1/?
<sirn> or some similar path, it should be possible to read from temp1_input and temp2_input
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<jimwilson> enthusi, try the "sensors" command
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<jimwilson> at least that works in the SiFive OpenEmbedded release
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<enthusi> jimwilson: will do. On ubuntu right now but still in looking-around-phase
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* sorear notes 2/3 of former peak users
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<GenTooMan> sorear for risc-v?
<sorear> for #riscv
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<enthusi> on the unmatched board: I am unsure if I should 'stay' with ubuntu (and some quirks) or rather go for the freedom sdk
<enthusi> I start prefereing the latter even if that means building alot myself
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<TwoNotes> Note to self: before loading user code to User pages, turn on SUM bit in sstatus
<jrtc27> second note to self: remember to turn SUM off?
<jrtc27> (and to not run interrupt handlers with it left on)
<TwoNotes> hee yes
<TwoNotes> I put it just around my memcpy routiune
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<geist2> usually idea is immediately jam it off at the top of the exception handler, in case you recursed inside the copy routines
<geist2> SMAP on x86 and arms PAN works more or less the same way
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<sorear> palmer: according to Half-Shot matrix users who held ops have been given admin access to the former #_freenode_#whatever:matrix.org rooms, I am unclear on the exact cutoff but you might be able to access that
<palmer> OK, I'm not sure how that works WRT my own bridge though
<palmer> IIRC I flipped off federation because I'm not really using Matrix, it's just a fancy IRC bouncer for me
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<sorear> ah, if you never exchanged state events with matrix.org that probably doesn't help us
* GenTooMan thinks #riscv has been a LOT more active than he can remember.
<sorear> there are about 20 people still in / reconnected to the new (InspIRCd-3) freenode #riscv
<sorear> GenTooMan: administrivia discussion of chat platforms doesn't count, but the new hifives have shipped and that's always good for something...
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<sorear> GenTooMan: last year was very quiet compared to before or after, most sw stuff is done and covid impacts on release schedules...
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