whitequark changed the topic of #nmigen to: nMigen hardware description language · code https://github.com/nmigen · logs https://libera.irclog.whitequark.org/nmigen
<_whitenotifier-a> [YoWASP/nextpnr] whitequark pushed 1 commit to develop [+0/-0/±1] https://git.io/JRhLK
<_whitenotifier-a> [YoWASP/nextpnr] whitequark f3496a0 - Update dependencies.
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<_whitenotifier-a> [YoWASP/yosys] whitequark pushed 1 commit to develop [+0/-0/±1] https://git.io/JRh3z
<_whitenotifier-a> [YoWASP/yosys] whitequark c8f6106 - Update dependencies.
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<mwk> whitequark: so do you have plans to fix the verilog backend reg issue (https://github.com/YosysHQ/yosys/issues/2035), or should I do it when I have a free spoon?
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