_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<fpga_zealot[m]> Anyone get Litex working for a Virtex 5?
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<_florent_> fpga_zealot[m]: The ISE build backend should allow it and generic designs should run on it, but not sure this has been tested (I did quite a bit of work on Virtex5, but before LiteX).
<fuzziphy> does the IMAC variant of VexRiscv work? Seem to be having issues with Rust imac 16bit aligned instructions in simulation
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