<davebee>
I'm trying to connect an interrupt from EventManager() / EventSourceProcess(). The pending register gets set correctly, when my irq source is asserted, but it doesn't generate an interrupt on the processor : I've set the ev_enable() register. I've looked at the uart.py as an example, but can't see how the cpu interrupt line is connected. Where should I look for clues? Thanks.
genpaku has quit [Remote host closed the connection]
genpaku has joined #litex
josuah` has quit [Quit: WeeChat 3.4.1]
josuah has joined #litex
linearcannon has joined #litex
linear_cannon has quit [Ping timeout: 240 seconds]
zjason`` is now known as zjason
<davebee>
Well now my interrupt line seems to be connected, but it no longer generates the C header stubs for that EventManager CSR.
<davebee>
Sorted now. I'm mixing Amaranth modules, VHDL and Litex, so adding an EventManager to my imported Amaranth module caused the issues.