<sajattack>
Hi guys, I'm having some trouble trying to get linux-on-litex-vexriscv to cooperate with pcie reloading on acorn cle-215+. I added the kwargs to make.py so it would build with pcie, but I get a warning about how the clocks are constrained in the target file in litex_boards (warning 1), if I comment out the lines it's talking about in the target file, I get some different warnings (warning2) followed by
<sajattack>
an overutilization error (error1) Please see this link for the errors I'm talking about if you think you can help https://hatebin.com/qrqulrwsiq
<sajattack>
is there just not enough resources for both pcie and linux-on-litex?
<sajattack>
or is it a more subtle constraint problem I don't understand
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<futarisIRCcloud>
Hi everyone. Been a while since I was here. Missed the move from Freenode. Good work on the Blackmagic Decklink stuff, _florent_ ...
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<somlo>
_florent_: is there a way to re-run the CI tests for litedram/pull/253, now that litex #923 has been applied?
<zyp>
just rebase your branch and force-push it
<zyp>
hmm, disregard, no rebase needed since it's a different repo
<somlo>
zyp: I poked around the github web u/i until I found something called "re-run all jobs" -- I think that's what I needed, but don't ask me how I found it :)
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<q3k>
_florent_: great work on the siglent acquisition stuff btw
<q3k>
(just saw that on the birbsite)
<nickoe>
_florent_: thanks, yes, it appears to do what I expect it to, I mean the modules added in the module gets the expected clock. It would probably have taken me quite a while to figure out that it worked that way. So thanks!
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<tmbinc1>
_florent_: yes, very cool work indeed! Thank you so much for that. (siglent)