08:51 <mmind00> naoki: both of those ideas sound great :-)

11:45 <CounterPillow> I'm currently working on RK3576 TSADC by the way, tried figuring out yesterday whether the DDR and GPU channels are swapped because downstream DT disagrees with the TRM

11:46 <CounterPillow> evidence so far is inconclusive because if I run a memory heavy workload what the TRM says is the GPU silicon also heats up though less so than what it says the DDR silicon is doing, and running a GPU workload is just gonna heat up the DDR as well due to it being memory bottlenecked

11:47 <CounterPillow> I didn't fix the ranges and ticks so a bit hard to compare but https://overviewer.org/~pillow/up/b8a5bd6ae2/tsadc-plot-2.png

11:47 <CounterPillow> https://overviewer.org/~pillow/up/1c25dea910/tsadc-plot-3.png

11:47 <CounterPillow> (kmscube because panfrost hits job timeouts with glmark2? that's a new one)

11:48 <CounterPillow> Currently I'm gonna focus my efforts on implementing using the trim values stored in OTP

11:48 <CounterPillow> (thanks to mmind00's OTP series <3)

14:57 <robmur01> CounterPillow: I recall from doing the GPU devfreq stuff on RK3399 that the thermal gradient between GPU and CPU zones only led to about 1.5-2 degrees difference. SoCs are small :)

19:06 <dvergatal> mmind00: around?

19:06 <mmind00> dvergatal: yep

19:07 <dvergatal> mmind00: priv